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            "keyfeatures" => "<ul><li>Compliant with MIPI D-PHY spec up to v2.5 and C-PHY spec up to v2.0</li><li>Support both MIPI DSI and CSI-2 protocols</li><li>Support HS data rate up to 6Gbps ( 6Gsps ) per lane (per trio)</li><li>Support LS data rate of 10Mbps and Ultra-low power mode</li><li>Support fast lane turnaround (FTA) and alternate low-power (ALP) mode</li><li>Support D-PHY mode with 1 clock lane &amp; up to 4 data lanes</li><li>Support C-PHY mode up to 3 trios for TX and 4 trios for RX</li><li>Support TX-EQ and Rx-EQ function to compensate loss of a long channel</li><li>Support additional D-PHY RX mode with 2 sets of (1 clock lane and up to 2 data lanes)</li><li>Support additional C-PHY RX mode with 2 sets of 2 trios</li><li>Provide D-PHY clock and data lane swap function</li><li>Provide C-PHY trios swap function</li><li>Provide a stand-alone at-speed multi-lanes (trios) parallel BIST module for mass production tests</li><li>Silicon proven in TSMC 28 HPC+</li></ul>"
            "keyfeatures_cn" => "<ul><li>符合MIPI D-PHYv2.5规范的和C-PHYv2.0规范的条例\r</li><li>同时支持MIPI DSI和CSI-2协议\r</li><li>支持HS数据率,每通道6Gbps(6Gsps)\r</li><li>支持10Mbps的LS数据速率和超低功耗模式\r</li><li>支持快速通道周转(FTA)和备用低功耗(ALP)模式\r</li><li>支持D-PHY模式,带有1个时钟通道和最多4个数据通道\r</li><li>支持C-PHY模式,TX最多支持3个三组,RX最多支持4个三组\r</li><li>支持TX-EQ和Rx-EQ功能,以补偿长通道的损失\r</li><li>支持额外的D-PHY RX模式,包括2组(1个时钟通道和最多2个数据通道)\r</li><li>支持额外的C-PHY RX模式,包括2组2个三组\r</li><li>提供D-PHY时钟和数据通道交换功能\r</li><li>提供C-PHY trios交换功能\r</li><li>提供一个独立的速度多车道(三)并行测试模块用于大规模生产测试\r</li><li>在TSMC 28HPC+工艺节点通过硅验证</li></ul>"
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            "overview_cn" => "在产品生产中,工艺节点通常采用C-PHY/D-PHY Combo来实现低功耗配置和减少生产成本。客户可在D-PHY或C-PHY模式下配置这个Combo PHY IP以实现不同领域应用的适配化。这个IP还支持PPI接口,能够快捷地连接到CIS-2或DSI控制器。在各种铸造工艺中,D-PHY和C/D-PHY Combo 都配备了最具竞争力的PPA(性能、功率和面积)和标准兼容性。此外,这个Combo PHY IP嗨通过ISO 26262 ASIL-B认证的MIPI D-PHY规范,提供了大量有关汽车多媒体应用的功能。"
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            "keyfeatures" => "<ul><li>Compliant with MIPI D-PHY spec up to v2.5 and C-PHY spec up to v2.0</li><li>Support both MIPI DSI and CSI-2 protocols</li><li>Support HS data rate up to 6Gbps ( 6Gsps ) per lane (per trio)</li><li>Support LS data rate of 10Mbps and Ultra-low power mode</li><li>Support fast lane turnaround (FTA) and alternate low-power (ALP) mode</li><li>Support D-PHY mode with 1 clock lane &amp; up to 4 data lanes</li><li>Support C-PHY mode up to 3 trios for TX and 4 trios for RX</li><li>Support TX-EQ and Rx-EQ function to compensate loss of a long channel</li><li>Support additional D-PHY RX mode with 2 sets of (1 clock lane and up to 2 data lanes)</li><li>Support additional C-PHY RX mode with 2 sets of 2 trios</li><li>Provide D-PHY clock and data lane swap function</li><li>Provide C-PHY trios swap function</li><li>Provide a stand-alone at-speed multi-lanes (trios) parallel BIST module for mass production tests</li><li>Silicon proven in TSMC 28 HPC+</li></ul>"
            "keyfeatures_cn" => "<ul><li>符合MIPI D-PHYv2.5规范的和C-PHYv2.0规范的条例\r</li><li>同时支持MIPI DSI和CSI-2协议\r</li><li>支持HS数据率,每通道6Gbps(6Gsps)\r</li><li>支持10Mbps的LS数据速率和超低功耗模式\r</li><li>支持快速通道周转(FTA)和备用低功耗(ALP)模式\r</li><li>支持D-PHY模式,带有1个时钟通道和最多4个数据通道\r</li><li>支持C-PHY模式,TX最多支持3个三组,Tx最多支持4个三组\r</li><li>支持TX-EQ和Tx-EQ功能,以补偿长通道的损失\r</li><li>支持额外的D-PHY Tx模式,包括2组(1个时钟通道和最多2个数据通道)\r</li><li>支持额外的C-PHY Tx模式,包括2组2个三组\r</li><li>提供D-PHY时钟和数据通道交换功能\r</li><li>提供C-PHY trios交换功能\r</li><li>提供一个独立的速度多车道(三)并行测试模块用于大规模生产测试\r</li><li>在TSMC 28HPC+工艺节点通过硅验证</li></ul>"
            "keywords" => "MIPI c/DPHY tx in tsmc28, physical layer combo, c/DPHY combo IP in TSMC hpc+, dsi/csi tx ip, dphy tx combo phy ip, csi controller, silicon proven dsi ip, c/dphy in tsmc 28hpc+, csi/dsi phy, combo phy 28hpc, dsiphy tx ip, c/dphy transmitter, combo analog "
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              C-PHY/D-PHY Combo at low cost and power in several manufacturing nodes. Users have the option of setting this Combo PHY in either D-PHY or C-PHY mode to support a variety of applications. Additionally, it complies with the PPI interface, which facilitates easy integration with the CIS-2 or DSI controller. D-PHY and C/D-PHY Combo have the most competitive PPA (Performance, Power, and Area) and standard compliances in a number of foundry processes. In addition to a wide range of features, the MIPI D-PHY already possesses ISO 26262 ASIL-B certification for automotive multimedia applications.<br />\n
               
              """
            "overview_cn" => "在产品生产中,工艺节点通常采用C-PHY/D-PHY Combo来实现低功耗配置和减少生产成本。客户可在D-PHY或C-PHY模式下配置这个Combo PHY IP以实现不同领域应用的适配化。这个IP还支持PPI接口,能够快捷地连接到CIS-2或DSI控制器。在各种铸造工艺中,D-PHY和C/D-PHY Combo 都配备了最具竞争力的PPA(性能、功率和面积)和标准兼容性。此外,这个Combo PHY IP嗨通过ISO 26262 ASIL-B认证的MIPI D-PHY规范,提供了大量有关汽车多媒体应用的功能。"
            "partnumber" => "MIPI C/D-PHY Combo Tx IP in 28HPC+"
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              <ul><li>Compliant with MIPI D-PHY spec up to v2.5 and C-PHY spec up to v2.0</li>\n
              <li>Support both MIPI DSI and CSI-2 protocols</li>\n
              <li>Support HS data rate up to 6Gbps ( 6Gsps ) per lane (per trio)</li>\n
              <li>Support LS data rate of 10Mbps and Ultra-low power mode</li>\n
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              """
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            "shortdescription" => "MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 28 HPC+"
            "shortdescription_cn" => "MIPI C/D-PHY 组合 Tx IP,硅在 TSMC 28 HPC+ 中得到验证"
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              C-PHY/D-PHY Combo at low cost and power in several manufacturing nodes. Users have the option of setting this PHY either D-PHY or C-PHY mode to support a variety applications. Additionally  it complies with PPI interface which facilitates easy integration CIS-2 DSI controller. C/D-PHY most competitive PPA (Performance Power Area) standard compliances number foundry processes. In addition wide range features MIPI already possesses ISO 26262 ASIL-B certification for automotive multimedia applications.\n
               Compliant spec up v2.5 v2.0Support both CSI-2 protocolsSupport HS data rate 6Gbps ( 6Gsps ) per lane (per trio)Support LS 10Mbps Ultra-low modeSupport fast turnaround (FTA) alternate low-power (ALP) 1 clock &amp; 4 lanesSupport 3 trios TX RXSupport TX-EQ Rx-EQ function compensate loss long channelSupport additional RX 2 sets (1 lanes)Support triosProvide swap functionProvide stand-alone at-speed multi-lanes (trios) parallel BIST module mass production testsSilicon proven TSMC 28 HPC+
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            "keyfeatures" => "<ul><li>Compliant with MIPI D-PHY spec up to v2.5 and C-PHY spec up to v2.0</li><li>Support both MIPI DSI and CSI-2 protocols</li><li>Support HS data rate up to 6Gbps ( 6Gsps ) per lane (per trio)</li><li>Support LS data rate of 10Mbps and Ultra-low power mode</li><li>Support fast lane turnaround (FTA) and alternate low-power (ALP) mode</li><li>Support D-PHY mode with 1 clock lane &amp; up to 4 data lanes</li><li>Support C-PHY mode up to 3 trios for TX and 4 trios for RX</li><li>Support TX-EQ and Rx-EQ function to compensate loss of a long channel</li><li>Support additional D-PHY RX mode with 2 sets of (1 clock lane and up to 2 data lanes)</li><li>Support additional C-PHY RX mode with 2 sets of 2 trios</li><li>Provide D-PHY clock and data lane swap function</li><li>Provide C-PHY trios swap function</li><li>Provide a stand-alone at-speed multi-lanes (trios) parallel BIST module for mass production tests</li><li>Silicon proven in TSMC 22 ULP</li></ul>"
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            "keywords" => "MIPI c/DPHY rx in tsmc22nm, physical layer combo, c/DPHY IP in TSMC, dsi/csi rx ip, dphy rx combo phy ip, csi controller, silicon proven dsi ip, c/dphy in tsmc 22ulp, csi/dsi phy, combo phy 22nm, dsiphy rx ip, c/dphy receiver, combo analog phy, small are"
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            "name" => "asic.node"
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            "overview_cn" => "在产品生产中,工艺节点通常采用C-PHY/D-PHY Combo来实现低功耗配置和减少生产成本。客户可在D-PHY或C-PHY模式下配置这个Combo PHY IP以实现不同领域应用的适配化。这个IP还支持PPI接口,能够快捷地连接到CIS-2或DSI控制器。在各种铸造工艺中,D-PHY和C/D-PHY Combo 都配备了最具竞争力的PPA(性能、功率和面积)和标准兼容性。此外,这个Combo PHY IP嗨通过ISO 26262 ASIL-B认证的MIPI D-PHY规范,提供了大量有关汽车多媒体应用的功能。"
            "partnumber" => "MIPI C/D-PHY Combo Rx IP in 22ULP"
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              <ul><li>Compliant with MIPI D-PHY spec up to v2.5 and C-PHY spec up to v2.0</li>\n
              <li>Support both MIPI DSI and CSI-2 protocols</li>\n
              <li>Support HS data rate up to 6Gbps ( 6Gsps ) per lane (per trio)</li>\n
              <li>Support LS data rate of 10Mbps and Ultra-low power mode</li>\n
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            "keyfeatures_cn" => "<ul><li>符合MIPI D-PHY规范的v2.5和C-PHY规范的v2.0\r</li><li>同时支持MIPI DSI和CSI-2协议\r</li><li>支持HS数据率,每车道6Gbps(6Gsps)\r</li><li>支持10Mbps的LS数据速率和超低功耗模式\r</li><li>支持快速通道周转(FTA)和备用低功耗(ALP)模式\r</li><li>支持D-PHY模式,带有1个时钟通道和最多4个数据通道\r</li><li>支持C-PHY模式,TX最多支持3个三组,RX最多支持4个三组\r</li><li>支持TX-EQ和Rx-EQ功能,以补偿长通道的损失\r</li><li>支持额外的D-PHY RX模式,包括2组(1个时钟通道和最多2个数据通道)\r</li><li>支持额外的C-PHY RX模式,包括2组2个三组\r</li><li>提供D-PHY时钟和数据通道交换功能\r</li><li>提供C-PHY trios交换功能\r</li><li>提供一个独立的速度多车道(三)并行测试模块用于大规模生产测试\r</li><li>在TSMC 16FFC工艺节点通过硅验证</li></ul>"
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            "overview_cn" => "在产品生产中,工艺节点通常采用C-PHY/D-PHY Combo来实现低功耗配置和减少生产成本。客户可在D-PHY或C-PHY模式下配置这个Combo PHY IP以实现不同领域应用的适配化。这个IP还支持PPI接口,能够快捷地集成到CIS-2或DSI控制器。在各种铸造工艺中,D-PHY和C/D-PHY组合都配备了最具竞争力的PPA(性能、功率和面积)和标准兼容性。此外,这个Combo PHY IP嗨通过ISO 26262 ASIL-B认证的MIPI D-PHY IP,提供了大量有关汽车多媒体应用的功能。"
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            "shortdescription_cn" => " MIPI C/D-PHY Combo Tx IP,硅在 TSMC 16 FFC 中得到验证"
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            "keyfeatures" => "<ul><li>Compliant with MIPI D-PHY spec up to v2.5 and C-PHY spec up to v2.0</li><li>Support both MIPI DSI and CSI-2 protocols</li><li>Support HS data rate up to 6Gbps ( 6Gsps ) per lane (per trio)</li><li>Support LS data rate of 10Mbps and Ultra-low power mode</li><li>Support fast lane turnaround (FTA) and alternate low-power (ALP) mode</li><li>Support D-PHY mode with 1 clock lane &amp; up to 4 data lanes</li><li>Support C-PHY mode up to 3 trios for TX and 4 trios for RX</li><li>Support TX-EQ and Rx-EQ function to compensate loss of a long channel</li><li>Support additional D-PHY RX mode with 2 sets of (1 clock lane and up to 2 data lanes)</li><li>Support additional C-PHY RX mode with 2 sets of 2 trios</li><li>Provide D-PHY clock and data lane swap function</li><li>Provide C-PHY trios swap function</li><li>Provide a stand-alone at-speed multi-lanes (trios) parallel BIST module for mass production tests</li><li>Silicon proven in TSMC 12FFC</li></ul>"
            "keyfeatures_cn" => "<ul><li>符合MIPI D-PHY规范的v2.5和C-PHY规范的v2.0条例\r</li><li>同时支持MIPI DSI和CSI-2协议\r</li><li>支持HS数据率,每车道6Gbps(6Gsps)\r</li><li>支持10Mbps的LS数据速率和超低功耗模式\r</li><li>支持快速通道周转(FTA)和备用低功耗(ALP)模式\r</li><li>支持D-PHY模式,带有1个时钟通道和最多4个数据通道\r</li><li>支持C-PHY模式,TX最多支持3个三组,RX最多支持4个三组\r</li><li>支持TX-EQ和Rx-EQ功能,以补偿长通道的损失\r</li><li>支持额外的D-PHY RX模式,包括2组(1个时钟通道和最多2个数据通道)\r</li><li>支持额外的C-PHY RX模式,包括2组2个三组\r</li><li>提供D-PHY时钟和数据通道交换功能\r</li><li>提供C-PHY trios交换功能\r</li><li>提供一个独立的速度多车道(三)并行测试模块用于大规模生产测试\r</li><li>在TSMC 12FFC工艺节点通过硅验证</li></ul>"
            "keywords" => "MIPI c/DPHY rx in tsmc12, physical layer combo, c/DPHY IP in TSMC, dsi/csi rx ip, dphy rx combo phy ip, csi controller, silicon proven dsi ip, c/dphy in tsmc 12, csi/dsi phy, combo phy 12ffc, dsiphy rx ip, c/dphy receiver, combo analog phy, small area c/"
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            "name" => "asic.node"
            "overview" => "Several production nodes employ C-PHY/D-PHY Combo with the least amount of power and expense. To accommodate a range of applications, users can configure this Combo PHY in either D-PHY or C-PHY mode. It also complies with the PPI interface, making it simple to connect to either the CIS-2 or DSI controller. The most competitive PPA (Performance, Power, and Area) and standard compliances across a variety of foundry processes are found in D-PHY and C/D-PHY Combo. Numerous functionalities are offered by the ISO 26262 ASIL-B certified MIPI D-PHY for multimedia applications in automobiles."
            "overview_cn" => "在产品生产中,工艺节点通常采用C-PHY/D-PHY Combo来实现低功耗配置和减少生产成本。客户可在D-PHY或C-PHY模式下配置这个Combo PHY IP以实现不同领域应用的适配化。这个IP还支持PPI接口,能够快捷地连接到CIS-2或DSI控制器。在各种铸造工艺中,D-PHY和C/D-PHY组合都配备了最具竞争力的PPA(性能、功率和面积)和标准兼容性。此外,这个Combo PHY IP嗨通过ISO 26262 ASIL-B认证的MIPI D-PHY规范,提供了大量有关汽车多媒体应用的功能。"
            "partnumber" => "MIPI C/D-PHY Combo Rx IP in 12FFC"
            "priority" => 1
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              <ul><li>Compliant with MIPI D-PHY spec up to v2.5 and C-PHY spec up to v2.0</li>\n
              <li>Support both MIPI DSI and CSI-2 protocols</li>\n
              <li>Support HS data rate up to 6Gbps ( 6Gsps ) per lane (per trio)</li>\n
              <li>Support LS data rate of 10Mbps and Ultra-low power mode</li>\n
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            "seofeatures_cn" => ""
            "shortdescription" => "MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 12 FFC"
            "shortdescription_cn" => " MIPI C/D-PHY Combo Rx IP,硅在 TSMC 12 FFC 中得到验证"
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            "text_high_priority" => "MIPI C/D-PHY Combo Rx IP in 12FFC  Silicon Proven TSMC 12 FFC T2M GmbH"
            "text_low_priority" => "Several production nodes employ C-PHY/D-PHY Combo with the least amount of power and expense. To accommodate a range applications  users can configure this PHY in either D-PHY or C-PHY mode. It also complies PPI interface making it simple to connect CIS-2 DSI controller. The most competitive PPA (Performance Power Area) standard compliances across variety foundry processes are found C/D-PHY Combo. Numerous functionalities offered by ISO 26262 ASIL-B certified MIPI for multimedia automobiles. Compliant spec up v2.5 v2.0Support both CSI-2 protocolsSupport HS data rate 6Gbps ( 6Gsps ) per lane (per trio)Support LS 10Mbps Ultra-low modeSupport fast turnaround (FTA) alternate low-power (ALP) mode 1 clock &amp; 4 lanesSupport 3 trios TX RXSupport TX-EQ Rx-EQ function compensate loss long channelSupport additional RX 2 sets (1 lanes)Support triosProvide swap functionProvide stand-alone at-speed multi-lanes (trios) parallel BIST module mass testsSilicon proven TSMC 12FFC"
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              <li>Support both MIPI DSI and CSI-2 protocols</li>\n
              <li>Support HS data rate up to 6Gbps ( 6Gsps ) per lane (per trio)</li>\n
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            "keyfeatures" => "<ul><li>Compliant with MIPI D-PHY spec up to v2.5 and C-PHY spec up to v2.0</li><li>Support both MIPI DSI and CSI-2 protocols</li><li>Support HS data rate up to 6Gbps ( 6Gsps ) per lane (per trio)</li><li>Support LS data rate of 10Mbps and Ultra-low power mode</li><li>Support fast lane turnaround (FTA) and alternate low-power (ALP) mode</li><li>Support D-PHY mode with 1 clock lane &amp; up to 4 data lanes</li><li>Support C-PHY mode up to 3 trios for TX and 4 trios for RX</li><li>Support TX-EQ and Rx-EQ function to compensate loss of a long channel</li><li>Support additional D-PHY RX mode with 2 sets of (1 clock lane and up to 2 data lanes)</li><li>Support additional C-PHY RX mode with 2 sets of 2 trios</li><li>Provide D-PHY clock and data lane swap function</li><li>Provide C-PHY trios swap function</li><li>Provide a stand-alone at-speed multi-lanes (trios) parallel BIST module for mass production tests</li><li>Silicon proven in TSMC 28 HPC+</li></ul>"
            "keyfeatures_cn" => "<ul><li>符合MIPI D-PHYv2.5规范的和C-PHYv2.0规范的条例\r</li><li>同时支持MIPI DSI和CSI-2协议\r</li><li>支持HS数据率,每通道6Gbps(6Gsps)\r</li><li>支持10Mbps的LS数据速率和超低功耗模式\r</li><li>支持快速通道周转(FTA)和备用低功耗(ALP)模式\r</li><li>支持D-PHY模式,带有1个时钟通道和最多4个数据通道\r</li><li>支持C-PHY模式,TX最多支持3个三组,RX最多支持4个三组\r</li><li>支持TX-EQ和Rx-EQ功能,以补偿长通道的损失\r</li><li>支持额外的D-PHY RX模式,包括2组(1个时钟通道和最多2个数据通道)\r</li><li>支持额外的C-PHY RX模式,包括2组2个三组\r</li><li>提供D-PHY时钟和数据通道交换功能\r</li><li>提供C-PHY trios交换功能\r</li><li>提供一个独立的速度多车道(三)并行测试模块用于大规模生产测试\r</li><li>在TSMC 28HPC+工艺节点通过硅验证</li></ul>"
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            "overview_cn" => "在产品生产中,工艺节点通常采用C-PHY/D-PHY Combo来实现低功耗配置和减少生产成本。客户可在D-PHY或C-PHY模式下配置这个Combo PHY IP以实现不同领域应用的适配化。这个IP还支持PPI接口,能够快捷地连接到CIS-2或DSI控制器。在各种铸造工艺中,D-PHY和C/D-PHY Combo 都配备了最具竞争力的PPA(性能、功率和面积)和标准兼容性。此外,这个Combo PHY IP嗨通过ISO 26262 ASIL-B认证的MIPI D-PHY规范,提供了大量有关汽车多媒体应用的功能。"
            "partnumber" => "MIPI C/D-PHY Combo Rx IP in 28HPC+"
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            "text_low_priority" => "Several production nodes employ C-PHY/D-PHY Combo to consume the least amount of energy and funds. Users can configure PHY in D-PHY or C-PHY mode support a range applications. Additionally  it complies with PPI interface making simple connect either CIS-2 DSI controller. The most competitive foundry methods terms PPA (Performance Power Area) standard compliances are C/D-PHY Combo. A wide functions offered by ISO 26262 ASIL-B approved MIPI for automotive multimedia Compliant spec up v2.5 v2.0Support both CSI-2 protocolsSupport HS data rate 6Gbps ( 6Gsps ) per lane (per trio)Support LS 10Mbps Ultra-low power modeSupport fast turnaround (FTA) alternate low-power (ALP) 1 clock &amp; 4 lanesSupport 3 trios TX RXSupport TX-EQ Rx-EQ function compensate loss long channelSupport additional RX 2 sets (1 lanes)Support triosProvide swap functionProvide stand-alone at-speed multi-lanes (trios) parallel BIST module mass testsSilicon proven TSMC 28 HPC+"
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              C-PHY/D-PHY Combo at low cost and power in several manufacturing nodes. Users have the option of setting this Combo PHY in either D-PHY or C-PHY mode to support a variety of applications. Additionally, it complies with the PPI interface, which facilitates easy integration with the CIS-2 or DSI controller. D-PHY and C/D-PHY Combo have the most competitive PPA (Performance, Power, and Area) and standard compliances in a number of foundry processes. In addition to a wide range of features, the MIPI D-PHY already possesses ISO 26262 ASIL-B certification for automotive multimedia applications.<br />\n
               
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            "overview_cn" => "在产品生产中,工艺节点通常采用C-PHY/D-PHY Combo来实现低功耗配置和减少生产成本。客户可在D-PHY或C-PHY模式下配置这个Combo PHY IP以实现不同领域应用的适配化。这个IP还支持PPI接口,能够快捷地连接到CIS-2或DSI控制器。在各种铸造工艺中,D-PHY和C/D-PHY Combo 都配备了最具竞争力的PPA(性能、功率和面积)和标准兼容性。此外,这个Combo PHY IP嗨通过ISO 26262 ASIL-B认证的MIPI D-PHY规范,提供了大量有关汽车多媒体应用的功能。"
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              <ul><li>Compliant with MIPI D-PHY spec up to v2.5 and C-PHY spec up to v2.0</li>\n
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              <li>Support HS data rate up to 6Gbps ( 6Gsps ) per lane (per trio)</li>\n
              <li>Support LS data rate of 10Mbps and Ultra-low power mode</li>\n
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            "shortdescription" => "MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 28 HPC+"
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              C-PHY/D-PHY Combo at low cost and power in several manufacturing nodes. Users have the option of setting this PHY either D-PHY or C-PHY mode to support a variety applications. Additionally  it complies with PPI interface which facilitates easy integration CIS-2 DSI controller. C/D-PHY most competitive PPA (Performance Power Area) standard compliances number foundry processes. In addition wide range features MIPI already possesses ISO 26262 ASIL-B certification for automotive multimedia applications.\n
               Compliant spec up v2.5 v2.0Support both CSI-2 protocolsSupport HS data rate 6Gbps ( 6Gsps ) per lane (per trio)Support LS 10Mbps Ultra-low modeSupport fast turnaround (FTA) alternate low-power (ALP) 1 clock &amp; 4 lanesSupport 3 trios TX RXSupport TX-EQ Rx-EQ function compensate loss long channelSupport additional RX 2 sets (1 lanes)Support triosProvide swap functionProvide stand-alone at-speed multi-lanes (trios) parallel BIST module mass production testsSilicon proven TSMC 28 HPC+
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            "keywords" => "MIPI c/DPHY rx in tsmc22nm, physical layer combo, c/DPHY IP in TSMC, dsi/csi rx ip, dphy rx combo phy ip, csi controller, silicon proven dsi ip, c/dphy in tsmc 22ulp, csi/dsi phy, combo phy 22nm, dsiphy rx ip, c/dphy receiver, combo analog phy, small are"
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            "keywords" => "MIPI c/DPHY tx in tsmc22, physical layer combo, c/DPHY IP in TSMC ulp, dsi/csi tx ip, dphy tx combo phy ip, csi controller, silicon proven dsi ip, c/dphy in tsmc 22ulp, csi/dsi phy, combo phy 22nm, dsiphy tx ip, c/dphy transmitter, combo analog phy, smal"
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            "overview_cn" => "在产品生产中,工艺节点通常采用C-PHY/D-PHY Combo来实现低功耗配置和减少生产成本。客户可在D-PHY或C-PHY模式下配置这个Combo PHY IP以实现不同领域应用的适配化。这个IP还支持PPI接口,能够快捷地集成到CIS-2或DSI控制器。在各种铸造工艺中,D-PHY和C/D-PHY组合都配备了最具竞争力的PPA(性能、功率和面积)和标准兼容性。此外,这个Combo PHY IP嗨通过ISO 26262 ASIL-B认证的MIPI D-PHY IP,提供了大量有关汽车多媒体应用的功能。"
            "partnumber" => "MIPI C/D-PHY Combo Tx IP in 22ULP"
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            "overview_cn" => "在产品生产中,工艺节点通常采用C-PHY/D-PHY Combo来实现低功耗配置和减少生产成本。客户可在D-PHY或C-PHY模式下配置这个Combo PHY IP以实现不同领域应用的适配化。这个IP还支持PPI接口,能够快捷地连接到CIS-2或DSI控制器。在各种铸造工艺中,D-PHY和C/D-PHY组合都配备了最具竞争力的PPA(性能、功率和面积)和标准兼容性。此外,这个Combo PHY IP嗨通过ISO 26262 ASIL-B认证的MIPI D-PHY规范,提供了大量有关汽车多媒体应用的功能。"
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              <li>Support HS data rate up to 6Gbps ( 6Gsps ) per lane (per trio)</li>\n
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            "shortdescription_cn" => " MIPI C/D-PHY Combo Rx IP,硅在 TSMC 12 FFC 中得到验证"
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            "keywords" => "MIPI c/DPHY rx in tsmc28nm, physical layer combo, c/DPHY IP in TSMC, dsi/csi rx ip, dphy rx combo phy ip, csi controller, silicon proven dsi ip, c/dphy in tsmc 28hpc+, csi/dsi phy, combo phy 28nm, dsiphy rx ip, c/dphy receiver, combo analog phy, small ar"
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            "overview_cn" => "在产品生产中,工艺节点通常采用C-PHY/D-PHY Combo来实现低功耗配置和减少生产成本。客户可在D-PHY或C-PHY模式下配置这个Combo PHY IP以实现不同领域应用的适配化。这个IP还支持PPI接口,能够快捷地连接到CIS-2或DSI控制器。在各种铸造工艺中,D-PHY和C/D-PHY Combo 都配备了最具竞争力的PPA(性能、功率和面积)和标准兼容性。此外,这个Combo PHY IP嗨通过ISO 26262 ASIL-B认证的MIPI D-PHY规范,提供了大量有关汽车多媒体应用的功能。"
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            "shortdescription_cn" => "MIPI C/D-PHY Combo Rx IP,硅在 TSMC 28 HPC+ 中得到验证"
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            "text_high_priority" => "MIPI C/D-PHY Combo Rx IP in 28HPC+  Silicon Proven TSMC 28 HPC+ T2M GmbH"
            "text_low_priority" => "Several production nodes employ C-PHY/D-PHY Combo to consume the least amount of energy and funds. Users can configure PHY in D-PHY or C-PHY mode support a range applications. Additionally  it complies with PPI interface making simple connect either CIS-2 DSI controller. The most competitive foundry methods terms PPA (Performance Power Area) standard compliances are C/D-PHY Combo. A wide functions offered by ISO 26262 ASIL-B approved MIPI for automotive multimedia Compliant spec up v2.5 v2.0Support both CSI-2 protocolsSupport HS data rate 6Gbps ( 6Gsps ) per lane (per trio)Support LS 10Mbps Ultra-low power modeSupport fast turnaround (FTA) alternate low-power (ALP) 1 clock &amp; 4 lanesSupport 3 trios TX RXSupport TX-EQ Rx-EQ function compensate loss long channelSupport additional RX 2 sets (1 lanes)Support triosProvide swap functionProvide stand-alone at-speed multi-lanes (trios) parallel BIST module mass testsSilicon proven TSMC 28 HPC+"
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            "keyfeatures" => "<ul><li>Compliant with MIPI D-PHY spec up to v2.5 and C-PHY spec up to v2.0</li><li>Support both MIPI DSI and CSI-2 protocols</li><li>Support HS data rate up to 6Gbps ( 6Gsps ) per lane (per trio)</li><li>Support LS data rate of 10Mbps and Ultra-low power mode</li><li>Support fast lane turnaround (FTA) and alternate low-power (ALP) mode</li><li>Support D-PHY mode with 1 clock lane &amp; up to 4 data lanes</li><li>Support C-PHY mode up to 3 trios for TX and 4 trios for RX</li><li>Support TX-EQ and Rx-EQ function to compensate loss of a long channel</li><li>Support additional D-PHY RX mode with 2 sets of (1 clock lane and up to 2 data lanes)</li><li>Support additional C-PHY RX mode with 2 sets of 2 trios</li><li>Provide D-PHY clock and data lane swap function</li><li>Provide C-PHY trios swap function</li><li>Provide a stand-alone at-speed multi-lanes (trios) parallel BIST module for mass production tests</li><li>Silicon proven in TSMC 28 HPC+</li></ul>"
            "keyfeatures_cn" => "<ul><li>符合MIPI D-PHYv2.5规范的和C-PHYv2.0规范的条例\r</li><li>同时支持MIPI DSI和CSI-2协议\r</li><li>支持HS数据率,每通道6Gbps(6Gsps)\r</li><li>支持10Mbps的LS数据速率和超低功耗模式\r</li><li>支持快速通道周转(FTA)和备用低功耗(ALP)模式\r</li><li>支持D-PHY模式,带有1个时钟通道和最多4个数据通道\r</li><li>支持C-PHY模式,TX最多支持3个三组,Tx最多支持4个三组\r</li><li>支持TX-EQ和Tx-EQ功能,以补偿长通道的损失\r</li><li>支持额外的D-PHY Tx模式,包括2组(1个时钟通道和最多2个数据通道)\r</li><li>支持额外的C-PHY Tx模式,包括2组2个三组\r</li><li>提供D-PHY时钟和数据通道交换功能\r</li><li>提供C-PHY trios交换功能\r</li><li>提供一个独立的速度多车道(三)并行测试模块用于大规模生产测试\r</li><li>在TSMC 28HPC+工艺节点通过硅验证</li></ul>"
            "keywords" => "MIPI c/DPHY tx in tsmc28, physical layer combo, c/DPHY combo IP in TSMC hpc+, dsi/csi tx ip, dphy tx combo phy ip, csi controller, silicon proven dsi ip, c/dphy in tsmc 28hpc+, csi/dsi phy, combo phy 28hpc, dsiphy tx ip, c/dphy transmitter, combo analog "
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              C-PHY/D-PHY Combo at low cost and power in several manufacturing nodes. Users have the option of setting this Combo PHY in either D-PHY or C-PHY mode to support a variety of applications. Additionally, it complies with the PPI interface, which facilitates easy integration with the CIS-2 or DSI controller. D-PHY and C/D-PHY Combo have the most competitive PPA (Performance, Power, and Area) and standard compliances in a number of foundry processes. In addition to a wide range of features, the MIPI D-PHY already possesses ISO 26262 ASIL-B certification for automotive multimedia applications.<br />\n
               
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            "overview_cn" => "在产品生产中,工艺节点通常采用C-PHY/D-PHY Combo来实现低功耗配置和减少生产成本。客户可在D-PHY或C-PHY模式下配置这个Combo PHY IP以实现不同领域应用的适配化。这个IP还支持PPI接口,能够快捷地连接到CIS-2或DSI控制器。在各种铸造工艺中,D-PHY和C/D-PHY Combo 都配备了最具竞争力的PPA(性能、功率和面积)和标准兼容性。此外,这个Combo PHY IP嗨通过ISO 26262 ASIL-B认证的MIPI D-PHY规范,提供了大量有关汽车多媒体应用的功能。"
            "partnumber" => "MIPI C/D-PHY Combo Tx IP in 28HPC+"
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              <ul><li>Compliant with MIPI D-PHY spec up to v2.5 and C-PHY spec up to v2.0</li>\n
              <li>Support both MIPI DSI and CSI-2 protocols</li>\n
              <li>Support HS data rate up to 6Gbps ( 6Gsps ) per lane (per trio)</li>\n
              <li>Support LS data rate of 10Mbps and Ultra-low power mode</li>\n
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            "seofeatures_cn" => ""
            "shortdescription" => "MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 28 HPC+"
            "shortdescription_cn" => "MIPI C/D-PHY 组合 Tx IP,硅在 TSMC 28 HPC+ 中得到验证"
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            "text_high_priority" => "MIPI C/D-PHY Combo Tx IP in 28HPC+  Silicon Proven TSMC 28 HPC+ T2M GmbH"
            "text_low_priority" => """
              C-PHY/D-PHY Combo at low cost and power in several manufacturing nodes. Users have the option of setting this PHY either D-PHY or C-PHY mode to support a variety applications. Additionally  it complies with PPI interface which facilitates easy integration CIS-2 DSI controller. C/D-PHY most competitive PPA (Performance Power Area) standard compliances number foundry processes. In addition wide range features MIPI already possesses ISO 26262 ASIL-B certification for automotive multimedia applications.\n
               Compliant spec up v2.5 v2.0Support both CSI-2 protocolsSupport HS data rate 6Gbps ( 6Gsps ) per lane (per trio)Support LS 10Mbps Ultra-low modeSupport fast turnaround (FTA) alternate low-power (ALP) 1 clock &amp; 4 lanesSupport 3 trios TX RXSupport TX-EQ Rx-EQ function compensate loss long channelSupport additional RX 2 sets (1 lanes)Support triosProvide swap functionProvide stand-alone at-speed multi-lanes (trios) parallel BIST module mass production testsSilicon proven TSMC 28 HPC+
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            "keyfeatures" => "<ul><li>Compliant with MIPI D-PHY spec up to v2.5 and C-PHY spec up to v2.0</li><li>Support both MIPI DSI and CSI-2 protocols</li><li>Support HS data rate up to 6Gbps ( 6Gsps ) per lane (per trio)</li><li>Support LS data rate of 10Mbps and Ultra-low power mode</li><li>Support fast lane turnaround (FTA) and alternate low-power (ALP) mode</li><li>Support D-PHY mode with 1 clock lane &amp; up to 4 data lanes</li><li>Support C-PHY mode up to 3 trios for TX and 4 trios for RX</li><li>Support TX-EQ and Rx-EQ function to compensate loss of a long channel</li><li>Support additional D-PHY RX mode with 2 sets of (1 clock lane and up to 2 data lanes)</li><li>Support additional C-PHY RX mode with 2 sets of 2 trios</li><li>Provide D-PHY clock and data lane swap function</li><li>Provide C-PHY trios swap function</li><li>Provide a stand-alone at-speed multi-lanes (trios) parallel BIST module for mass production tests</li><li>Silicon proven in TSMC 22 ULP</li></ul>"
            "keyfeatures_cn" => "<ul><li>符合MIPI D-PHYv2.5规范的和C-PHYv2.0规范的条例\r</li><li>同时支持MIPI DSI和CSI-2协议\r</li><li>支持HS数据率,每通道6Gbps(6Gsps)\r</li><li>支持10Mbps的LS数据速率和超低功耗模式\r</li><li>支持快速通道周转(FTA)和备用低功耗(ALP)模式\r</li><li>支持D-PHY模式,带有1个时钟通道和最多4个数据通道\r</li><li>支持C-PHY模式,TX最多支持3个三组,RX最多支持4个三组\r</li><li>支持TX-EQ和Rx-EQ功能,以补偿长通道的损失\r</li><li>支持额外的D-PHY RX模式,包括2组(1个时钟通道和最多2个数据通道)\r</li><li>支持额外的C-PHY RX模式,包括2组2个三组\r</li><li>提供D-PHY时钟和数据通道交换功能\r</li><li>提供C-PHY trios交换功能\r</li><li>提供一个独立的速度多车道(三)并行测试模块用于大规模生产测试\r</li><li>在TSMC 22 ULP工艺节点通过硅验证</li></ul>"
            "keywords" => "MIPI c/DPHY rx in tsmc22nm, physical layer combo, c/DPHY IP in TSMC, dsi/csi rx ip, dphy rx combo phy ip, csi controller, silicon proven dsi ip, c/dphy in tsmc 22ulp, csi/dsi phy, combo phy 22nm, dsiphy rx ip, c/dphy receiver, combo analog phy, small are"
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            "overview" => "In order to use the least amount of power and money, several production nodes use C-PHY/D-PHY Combo. The Combo PHY can be set up by users in either D-PHY or C-PHY mode to support a variety of applications. It is also PPI interface compliant, making it straightforward to connect to either the CIS-2 or DSI controller. In terms of PPA (Performance, Power, and Area) and standard compliances, D-PHY and C/D-PHY Combo are the most competitive foundry processes. The ISO 26262 ASIL-B certified MIPI D-PHY for automotive multimedia applications provides a wide range of features."
            "overview_cn" => "在产品生产中,工艺节点通常采用C-PHY/D-PHY Combo来实现低功耗配置和减少生产成本。客户可在D-PHY或C-PHY模式下配置这个Combo PHY IP以实现不同领域应用的适配化。这个IP还支持PPI接口,能够快捷地连接到CIS-2或DSI控制器。在各种铸造工艺中,D-PHY和C/D-PHY Combo 都配备了最具竞争力的PPA(性能、功率和面积)和标准兼容性。此外,这个Combo PHY IP嗨通过ISO 26262 ASIL-B认证的MIPI D-PHY规范,提供了大量有关汽车多媒体应用的功能。"
            "partnumber" => "MIPI C/D-PHY Combo Rx IP in 22ULP"
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              <ul><li>Compliant with MIPI D-PHY spec up to v2.5 and C-PHY spec up to v2.0</li>\n
              <li>Support both MIPI DSI and CSI-2 protocols</li>\n
              <li>Support HS data rate up to 6Gbps ( 6Gsps ) per lane (per trio)</li>\n
              <li>Support LS data rate of 10Mbps and Ultra-low power mode</li>\n
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            "shortdescription" => "MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 22 ULP"
            "shortdescription_cn" => "MIPI C/D-PHY Combo Rx IP,在 TSMC 22 ULP 中经过硅验证"
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            "text_high_priority" => "MIPI C/D-PHY Combo Rx IP in 22ULP  Silicon Proven TSMC 22 ULP T2M GmbH"
            "text_low_priority" => "In order to use the least amount of power and money  several production nodes C-PHY/D-PHY Combo. The Combo PHY can be set up by users in either D-PHY or C-PHY mode support a variety applications. It is also PPI interface compliant making it straightforward connect CIS-2 DSI controller. terms PPA (Performance Power Area) standard compliances C/D-PHY are most competitive foundry processes. ISO 26262 ASIL-B certified MIPI for automotive multimedia applications provides wide range features. Compliant with spec v2.5 v2.0Support both CSI-2 protocolsSupport HS data rate 6Gbps ( 6Gsps ) per lane (per trio)Support LS 10Mbps Ultra-low modeSupport fast turnaround (FTA) alternate low-power (ALP) 1 clock &amp; 4 lanesSupport 3 trios TX RXSupport TX-EQ Rx-EQ function compensate loss long channelSupport additional RX 2 sets (1 lanes)Support triosProvide swap functionProvide stand-alone at-speed multi-lanes (trios) parallel BIST module mass testsSilicon proven TSMC 22 ULP"
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            "keyfeatures_cn" => "<ul><li>符合MIPI D-PHY规范的v2.5和C-PHY规范的v2.0条例\r</li><li>同时支持MIPI DSI和CSI-2协议\r</li><li>支持HS数据率,每车道6Gbps(6Gsps)\r</li><li>支持10Mbps的LS数据速率和超低功耗模式\r</li><li>支持快速通道周转(FTA)和备用低功耗(ALP)模式\r</li><li>支持D-PHY模式,带有1个时钟通道和最多4个数据通道\r</li><li>支持C-PHY模式,TX最多支持3个三组,RX最多支持4个三组\r</li><li>支持TX-EQ和Rx-EQ功能,以补偿长通道的损失\r</li><li>支持额外的D-PHY RX模式,包括2组(1个时钟通道和最多2个数据通道)\r</li><li>支持额外的C-PHY RX模式,包括2组2个三组\r</li><li>提供D-PHY时钟和数据通道交换功能\r</li><li>提供C-PHY trios交换功能\r</li><li>提供一个独立的速度多车道(三)并行测试模块用于大规模生产测试\r</li><li>在TSMC 22 ULP工艺节点通过硅验证</li></ul>"
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            "keyfeatures_cn" => "<ul><li>符合MIPI D-PHY规范的v2.5和C-PHY规范的v2.0条例\r</li><li>同时支持MIPI DSI和CSI-2协议\r</li><li>支持HS数据率,每车道6Gbps(6Gsps)\r</li><li>支持10Mbps的LS数据速率和超低功耗模式\r</li><li>支持快速通道周转(FTA)和备用低功耗(ALP)模式\r</li><li>支持D-PHY模式,带有1个时钟通道和最多4个数据通道\r</li><li>支持C-PHY模式,TX最多支持3个三组,RX最多支持4个三组\r</li><li>支持TX-EQ和Rx-EQ功能,以补偿长通道的损失\r</li><li>支持额外的D-PHY RX模式,包括2组(1个时钟通道和最多2个数据通道)\r</li><li>支持额外的C-PHY RX模式,包括2组2个三组\r</li><li>提供D-PHY时钟和数据通道交换功能\r</li><li>提供C-PHY trios交换功能\r</li><li>提供一个独立的速度多车道(三)并行测试模块用于大规模生产测试\r</li><li>在TSMC 16FFC工艺节点通过硅验证</li></ul>"
            "keywords" => "MIPI c/DPHY rx in tsmc16, physical layer combo, c/DPHY IP in TSMC, dsi/csi rx ip, dphy rx combo phy ip, csi controller, silicon proven dsi ip, c/dphy in tsmc 16, csi/dsi phy, combo phy 12ffc, dsiphy rx ip, c/dphy receiver, combo analog phy, small area c/"
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            "overview" => "In order to use the least amount of power and money, several production nodes use C-PHY/D-PHY Combo. The Combo PHY can be set up by users in either D-PHY or C-PHY mode to support a variety of applications. It is also PPI interface compliant, making it straightforward to connect to either the CIS-2 or DSI controller. In terms of PPA (Performance, Power, and Area) and standard compliances, D-PHY and C/D-PHY Combo are the most competitive foundry processes. The ISO 26262 ASIL-B certified MIPI D-PHY for automotive multimedia applications provides a wide range of features."
            "overview_cn" => "在产品生产中,工艺节点通常采用C-PHY/D-PHY Combo来实现低功耗配置和减少生产成本。客户可在D-PHY或C-PHY模式下配置这个Combo PHY IP以实现不同领域应用的适配化。这个IP还支持PPI接口,能够快捷地连接到CIS-2或DSI控制器。在各种铸造工艺中,D-PHY和C/D-PHY组合都配备了最具竞争力的PPA(性能、功率和面积)和标准兼容性。此外,这个Combo PHY IP嗨通过ISO 26262 ASIL-B认证的MIPI D-PHY IP,提供了大量有关汽车多媒体应用的功能。"
            "partnumber" => "MIPI C/D-PHY Combo Rx IP in 16FFC"
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              <ul><li>Compliant with MIPI D-PHY spec up to v2.5 and C-PHY spec up to v2.0</li>\n
              <li>Support both MIPI DSI and CSI-2 protocols</li>\n
              <li>Support HS data rate up to 6Gbps ( 6Gsps ) per lane (per trio)</li>\n
              <li>Support LS data rate of 10Mbps and Ultra-low power mode</li>\n
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            "seofeatures_cn" => ""
            "shortdescription" => "MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 16 FFC"
            "shortdescription_cn" => "MIPI C/D-PHY Combo Rx IP,硅在 TSMC 16 FFC 中得到验证"
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            "text_high_priority" => "MIPI C/D-PHY Combo Rx IP in 16FFC  Silicon Proven TSMC 16 FFC T2M GmbH"
            "text_low_priority" => "In order to use the least amount of power and money  several production nodes C-PHY/D-PHY Combo. The Combo PHY can be set up by users in either D-PHY or C-PHY mode support a variety applications. It is also PPI interface compliant making it straightforward connect CIS-2 DSI controller. terms PPA (Performance Power Area) standard compliances C/D-PHY are most competitive foundry processes. ISO 26262 ASIL-B certified MIPI for automotive multimedia applications provides wide range features. Compliant with spec v2.5 v2.0Support both CSI-2 protocolsSupport HS data rate 6Gbps ( 6Gsps ) per lane (per trio)Support LS 10Mbps Ultra-low modeSupport fast turnaround (FTA) alternate low-power (ALP) 1 clock &amp; 4 lanesSupport 3 trios TX RXSupport TX-EQ Rx-EQ function compensate loss long channelSupport additional RX 2 sets (1 lanes)Support triosProvide swap functionProvide stand-alone at-speed multi-lanes (trios) parallel BIST module mass testsSilicon proven TSMC 16FFC"
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            "keyfeatures" => "<ul><li>Compliant with MIPI D-PHY spec up to v2.5 and C-PHY spec up to v2.0</li><li>Support both MIPI DSI and CSI-2 protocols</li><li>Support HS data rate up to 6Gbps ( 6Gsps ) per lane (per trio)</li><li>Support LS data rate of 10Mbps and Ultra-low power mode</li><li>Support fast lane turnaround (FTA) and alternate low-power (ALP) mode</li><li>Support D-PHY mode with 1 clock lane &amp; up to 4 data lanes</li><li>Support C-PHY mode up to 3 trios for TX and 4 trios for RX</li><li>Support TX-EQ and Rx-EQ function to compensate loss of a long channel</li><li>Support additional D-PHY RX mode with 2 sets of (1 clock lane and up to 2 data lanes)</li><li>Support additional C-PHY RX mode with 2 sets of 2 trios</li><li>Provide D-PHY clock and data lane swap function</li><li>Provide C-PHY trios swap function</li><li>Provide a stand-alone at-speed multi-lanes (trios) parallel BIST module for mass production tests</li><li>Silicon proven in TSMC 12FFC</li></ul>"
            "keyfeatures_cn" => "<ul><li>符合MIPI D-PHY规范的v2.5和C-PHY规范的v2.0条例\r</li><li>同时支持MIPI DSI和CSI-2协议\r</li><li>支持HS数据率,每车道6Gbps(6Gsps)\r</li><li>支持10Mbps的LS数据速率和超低功耗模式\r</li><li>支持快速通道周转(FTA)和备用低功耗(ALP)模式\r</li><li>支持D-PHY模式,带有1个时钟通道和最多4个数据通道\r</li><li>支持C-PHY模式,TX最多支持3个三组,RX最多支持4个三组\r</li><li>支持TX-EQ和Rx-EQ功能,以补偿长通道的损失\r</li><li>支持额外的D-PHY RX模式,包括2组(1个时钟通道和最多2个数据通道)\r</li><li>支持额外的C-PHY RX模式,包括2组2个三组\r</li><li>提供D-PHY时钟和数据通道交换功能\r</li><li>提供C-PHY trios交换功能\r</li><li>提供一个独立的速度多车道(三)并行测试模块用于大规模生产测试\r</li><li>在TSMC 12FFC工艺节点通过硅验证</li></ul>"
            "keywords" => "MIPI c/DPHY rx in tsmc12, physical layer combo, c/DPHY IP in TSMC, dsi/csi rx ip, dphy rx combo phy ip, csi controller, silicon proven dsi ip, c/dphy in tsmc 12, csi/dsi phy, combo phy 12ffc, dsiphy rx ip, c/dphy receiver, combo analog phy, small area c/"
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            "name" => "asic.node"
            "overview" => "Several production nodes employ C-PHY/D-PHY Combo with the least amount of power and expense. To accommodate a range of applications, users can configure this Combo PHY in either D-PHY or C-PHY mode. It also complies with the PPI interface, making it simple to connect to either the CIS-2 or DSI controller. The most competitive PPA (Performance, Power, and Area) and standard compliances across a variety of foundry processes are found in D-PHY and C/D-PHY Combo. Numerous functionalities are offered by the ISO 26262 ASIL-B certified MIPI D-PHY for multimedia applications in automobiles."
            "overview_cn" => "在产品生产中,工艺节点通常采用C-PHY/D-PHY Combo来实现低功耗配置和减少生产成本。客户可在D-PHY或C-PHY模式下配置这个Combo PHY IP以实现不同领域应用的适配化。这个IP还支持PPI接口,能够快捷地连接到CIS-2或DSI控制器。在各种铸造工艺中,D-PHY和C/D-PHY组合都配备了最具竞争力的PPA(性能、功率和面积)和标准兼容性。此外,这个Combo PHY IP嗨通过ISO 26262 ASIL-B认证的MIPI D-PHY规范,提供了大量有关汽车多媒体应用的功能。"
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              <ul><li>Compliant with MIPI D-PHY spec up to v2.5 and C-PHY spec up to v2.0</li>\n
              <li>Support both MIPI DSI and CSI-2 protocols</li>\n
              <li>Support HS data rate up to 6Gbps ( 6Gsps ) per lane (per trio)</li>\n
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            "shortdescription_cn" => " MIPI C/D-PHY Combo Rx IP,硅在 TSMC 12 FFC 中得到验证"
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            "text_high_priority" => "MIPI C/D-PHY Combo Rx IP in 12FFC  Silicon Proven TSMC 12 FFC T2M GmbH"
            "text_low_priority" => "Several production nodes employ C-PHY/D-PHY Combo with the least amount of power and expense. To accommodate a range applications  users can configure this PHY in either D-PHY or C-PHY mode. It also complies PPI interface making it simple to connect CIS-2 DSI controller. The most competitive PPA (Performance Power Area) standard compliances across variety foundry processes are found C/D-PHY Combo. Numerous functionalities offered by ISO 26262 ASIL-B certified MIPI for multimedia automobiles. Compliant spec up v2.5 v2.0Support both CSI-2 protocolsSupport HS data rate 6Gbps ( 6Gsps ) per lane (per trio)Support LS 10Mbps Ultra-low modeSupport fast turnaround (FTA) alternate low-power (ALP) mode 1 clock &amp; 4 lanesSupport 3 trios TX RXSupport TX-EQ Rx-EQ function compensate loss long channelSupport additional RX 2 sets (1 lanes)Support triosProvide swap functionProvide stand-alone at-speed multi-lanes (trios) parallel BIST module mass testsSilicon proven TSMC 12FFC"
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            "overview_cn" => "在产品生产中,工艺节点通常采用C-PHY/D-PHY Combo来实现低功耗配置和减少生产成本。客户可在D-PHY或C-PHY模式下配置这个Combo PHY IP以实现不同领域应用的适配化。这个IP还支持PPI接口,能够快捷地连接到CIS-2或DSI控制器。在各种铸造工艺中,D-PHY和C/D-PHY组合都配备了最具竞争力的PPA(性能、功率和面积)和标准兼容性。此外,这个Combo PHY IP嗨通过ISO 26262 ASIL-B认证的MIPI D-PHY IP,提供了大量有关汽车多媒体应用的功能"
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Mipi c/d-phy combo IP

MIPI C/D-PHY Combo IP

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