HSSTP PHY IP

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Compare 3 IP from 3 vendors (1 - 3)

ARM HSSTP PHY with Link Layer
- ARM HS-STP v6.0
- ARM Coresight DDI 0314H
- Xilinx Aurora 8b/10b v2.2
HSSTP TX PHY 5nm Samsung Foundry
- Samsung Foundry 5nm (SF5A) CMOS device technology
- 1.8V±5%, 0.75V±5% power supply
- Fully supports ARM HSSTP v6.0
- Supports 1.5/3/6Gbps data rates
Multi Standard programmable SERDES PHY with single/multi-lane configurations with support of long-reach channel
- Single SERDES Design that meets wide range of Standards, Protocols and Speeds.
- Any combination is possible, e.g. USB-3.0, PCIe Gen-3 and SATA Gen-3 in a single Combo SERDES.
- Internal Low Jitter PLL support the various standards clocking requirements- no need for additional components.
- Flexible Design- Tile Based Design that enable customer to select any number of Tx and Rx Lanes.