BCH Codec IP
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Very Low Latency BCH Codec
- High performance, low latency
- Small size (75K gates for k=298, t=4) configuration, the core uses just 17K gates in ASIC)
- Entirely self-contained (no external RAM required)
- Data inputs and outputs have flip-flops attached to the pins
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Parameterizable compact BCH codec
- Highly parameterizable
- Very low area (in the largest, n = 511 t = 16 configuration, the core uses just 17K gates in ASIC)
- Entirely self-contained (no external RAM required)
