Alphawave IP IP
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CAN XL Verification IP
- The CAN XL Verification IP provides an effective & efficient way to verify the CAN components of an IP or SoC.
- The CAN XL VIP is fully compliant with CAN XL specifications (CiA 610-1, CiA 610-3, 11898-1 2024, 11898-2 2024, CiA 611-1).
- The VIP is light weight with easy plug-and-play components so that there is no hit on the design cycle time.
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ARTIX Ultra Scale Plus NVME HOST IP – Gen4
- When using a PCIe RP IP configured in Gen4 the system frequency is at 250MHz/256-Bits.
- When using a PCIe RP IP configured in Gen3 the system frequency is at 125MHz/256-Bits.
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ARINC 429 IP
- The M429GEN IP implements a synchronous single-chip ARINC 429 Transmit and Receive Controller capable of linking one CPU to one or several ARINC 429 bus.
- The IP controls all ARINC 429 bus specific sequences, protocol and timing. The M429GEN IP interface allows the parallel-bus microprocessor to communicate bidirectionally with the ARINC 429 bus.
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Kintex Ultra Scale Plus NVMe Host IP
- The LDS NVME HOST IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD.
- The register file interface simplify the management of the IP for CPU interface or State Machine interface using AXI bus.
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AGILEX 7 R-Tile Gen5 NVMe Host IP
- The LDS NVME HOST IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD.
- The register file interface simplify the management of the IP for CPU interface or State Machine interface using Avalon bus.
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802.11ax PHY Layer C Floating-Point Code IP for the STA mode
- This IP includes a recommendation-compliant 802.11ax PHY layer C floating-point code for the Station (STA) mode.
- The code is integrated into a simulation environment that allows the configuration of mandatory features and the performance evaluation in terms of frame error rate.
- It is designed to generate fixed-point sequences in order to accelerate the development of both C fixed-point code and HDL code for prototyping environments.
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UALink PCS IP Core
- The UA Link PCS IP Core is a high-performance, silicon-agnostic and fully compliant Physical Coding Sublayer (PCS) implementation of UALink_200 specification.
- Designed for seamless integration into accelerator, switch, and SoC designs, it delivers deterministic low-latency, robust error correction, and compatibility with multiple high-speed Ethernet-derived link rates.
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Bluetooth Platform IP
- The GR2000 BLE Platform IPs are wireless IP targeting Bluetooth Low Energy applications.
- The IPs are the cost-effective, ultra-low power, 2.4GHz RF IP.
- Very low active RF and low-power mode current consumption provide excellent battery lifetime and allow for operation on small coin cell batteries and in energy-harvesting applications.
- The IPs support Bluetooth 5 Low Energy key features: 1 Mbps/2Mbps and Long Range.
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Lossless & Lossy Frame Compression IP
- The CFrame60 is a Lossless & Lossy Frame Compression Hardware IP, Designed to significantly reduce memory size, DRAM bandwidth and power.
- This ultra-small, highly flexible IP consists of a set of compression IP and decompression IP, with the ability to easily switch between lossless and lossy.
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xSPI + eMMC Combo PHY IP
- This IP integrates both xSPI (Expanded Serial Peripheral Interface) and eMMC 5.1 PHY (Physical Layer) into a single unified solution, enabling support for two distinct memory protocols within the same IP.
- By combining the PHY layers for both interfaces, the design simplifies system integration, reduces area and pin count, and enhances design flexibility for SoCs that require both boot and high-speed storage functionality.
