AES-GCM Crypto Engine IP
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Secure-IC's Securyzr(TM) AES-GCM Multi-Booster Réduire la liste des FPGA aux noms des gammes
- High throughput
- Guaranteed performance with small packets
- 128-bit and 256-bit key
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Secure-IC's Securyzr(TM) AES-GCM Ultra-Low Latency
- High throughput: 64 GB/s (512 Gbps)
- Ultra-low latency
- Optional CRC support for data integrity
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Secure-IC's Securyzr™ AES Multi-purpose crypto engine with SCA protections
- ASIC and FPGA
- Supports a wide selection of programmable ciphering modes based on NIST SP 800-38:
- Masking option available with excellent protection against SPA & DPA
- Context switching
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AES-XTS Multi-Booster
- ASIC and FPGA
- High throughput:
- Scalable solution
- Supports 128-bit & 256-bit key
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ICE-IP-358 High-speed XTS-GCM Multi Stream Inline Cipher Engine, DPA resistant
- Silicon-proven implementation
- Fast and easy to integrate into SoCs
- Flexible layered design
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ICE-IP-338 High-speed XTS-GCM Multi Stream Inline Cipher Engine
- Performance and Configuration
- FIPS Certification
- Low Latency with Zero Variation
- Cryptographic Processing
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AES-GCM Multi-channel upto 2Tbps Crypto Accelerator
- EXAMPLE CONFIGURATIONS
- The SafeXcel-IP-63 has a scalable number of processing pipes and channels. It is available in different configurations, suitable for different applications to meet different gate count and throughput objectives.
- • EIP-63a-c17-r
- o single pipe, 17 channels, register based (no memories)
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Multi-Protocol Engine with Classifier, Look-Aside, 5-10 Gbps
- With Classifier, Look-Aside, 5-10 Gbps
- Silicon-proven implementation
- Fast and easy to integrate into SoCs
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Secure Boot Hardware Engine
- Protection Layers
- Public-Key Authentication Benefits
- Fast & Compact
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AES-GCM-XTS Crypto Accelerator
- Wide bus interface
- Basic AES encrypt and decrypt operations
- Key sizes: 128, 192 and 256 bits
- Key scheduling in hardware