16nm SerDes IP
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40
IP
from 4 vendors
(1
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10)
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PCIe 2.0 Serdes PHY IP, Silicon Proven in TSMC 16FFC
- Compatible with PCIe base Specification
- Full compatible with PIPE3.0 interface specification
- Independent channel power down control
- Implemented Receiver equalization Adaptive-CTLE to compensate insertion loss
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PCIe 3.0 Serdes PHY IP, Silicon Proven in TSMC 16FFC
- Compliant with PCIe 3.0 Base Specification
- Compliant with PIPE 4.3
- Supported data transfer rate: 2.5 GT/s, 5.0 GT/s and 8.0 GT/s
- Supported physical lane width: x4
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PCIe 4.0 Serdes PHY IP, Silicon Proven in TSMC 16FFC
- Compliant with PCIe 4.0 Base Specification
- Compliant with PIPE 4.4
- Supported data transfer rate: 2.5 GT/s, 5.0 GT/s, 8.0 GT/s and 16.0 GT/s
- Supported physical lane width: x4
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PCIe 5.0 Serdes PHY IP, Silicon Proven in TSMC 16FFC
- Compliant with PCIe 5.0 Base Specification
- Compliant with PIPE 5.1
- Supported data transfer rate: 2.5 GT/s, 5.0 GT/s, 8.0 GT/s, 16.0 GT/s and 32GT/s
- Supported physical lane width: x4
