100Gbps UDP/IP IP
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100G UDP/IP Hardware Protocol Stack
- Implements a UDP/IP hardware protocol stack that enables high-speed communication over a LAN or a point-to-point connection.
- Designed for standalone operation, the core is ideal for offloading the host processor from the demanding task of UDP/IP encapsulation and enables media streaming with speeds up to 100Gbps even in processor-less SoC designs.
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DiFi IP core
- The DiFi IP core is a highly scalable and silicon agnostic implementation of the IEEE-ISTO Std 4900-2021: Digital IF Interoperability Standard v1.2.1 targeting ASIC, and FPGA technologies.
- The DiFi implementation builds on long-time experience designing IP cores for sending and receiving Radio IQ data over Ethernet networks, and delivers a flexible engine that is prepared for tight integration with software applications.
