LPDDR2 PHY IP
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LPDDR2 PHY IP
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LPDDR2 PHY IP
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LPDDR2 IP solution
- Compatible with LPDDR2 up to 1066Mbps
- AXI compliant multi-ports, and data width, FIFO depth, command queue depth configurable
- DFI compliant interface between controller and PHY
- Support ECC (error correcting code)
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LPDDR2 Synthesizable Transactor
- Supports 100% of LPDDR2 protocol standard JESD209-2E and JESD209-2F
- Supports all the LPDDR2 commands as per the specs
- Supports up to 32GB device density
- Supports following devices:
