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Compare 5 Other from 3 vendors (1 - 5)
  • TCP/TCPSW Verification IP
    • Provides Ethernet fully compliant to 802.3-2018 supporting all media independent interfaces for (1/10/25/40/50/100/200/400/800 G)
    • Provides TCP as per RFC-9293 specification
      • Supports TCP connection establishment and closing connection
      • Supports TCP Flow Control
      • Supports Checksum Calculation and checksum error detection
      • Supports TCP Header creation and parsing
      • Supports Separation of TCP/nonTCP packets Encodes and decodes TCP headers
      • Supports unicast delivery of data
      • Bidirectional/unidirectional dataflow is supported over TCP connections
    • Supports TCP connection establishment and closing connection
    • Supports TCP Flow Control
    Block Diagram -- TCP/TCPSW Verification IP
  • E1/T1 Line Interface Unit / Framer
    • Best-in-Class size and performance and supports many hundreds of channels.
    • Provides multi-channel Jitter Attenuation in the receive and transmit paths.
    • Supports E1 and T1 rates. Fully synchronous and runs at high speeds.
    • Designed to provide G.832 and G.824 Output Jitter Compliance, capable of attenuating 2.048 kHz +/-50 ppm (E1), 1.544 kHz +/-32 ppm (T1)
  • Packet Classifier
    • 200MHz+ push button core performance.
    • Designed from the ground up to allow future protocol and channel/key scaling.
    • Fully compliant with Aliathon’s existing solutions;
    • Input key support from 256K to 1M.
  • M13 Multiplexer and De-multiplexer (M13MD)
    • 28 independent DS1 clock inputs each with programmable clock edge adapter.
    • 28 independent DS1 outputs each with programmable clock edge adapter.
    • 7 independent DS2 framers supporting DS1 and G.747.
    • 4 independent E2 framers.
  • ATM Framer
    • Conforms to ITU I.432.1.
    • Best-in-Class size and performance. Supports many thousands of channels.
    • Multiple FPGA vendor support.
    • Processes data for multiple independent TDM ATM streams.
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Semiconductor IP