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Warp Intel® FPGA IP

Overview

As a part of the Video and Vision Processing (VVP) Suite Intel® FPGA IP, the Warp Intel® FPGA IP provides a highly optimized solution for applying geometric corrections and arbitrary non-linear transformations to real-time video streams.

Warp Intel® FPGA IP Improves the Viewing Experience in a Wide Variety of Applications by:

  • Applying geometric and lens distortion corrections to video streams in real time.
  • Providing arbitrary warp transformation, including:
    • Fish-eye, barrel, and general lens/screen correction.
    • Keystone and pin-cushion correction.
  • Enabling continuous scaling factors and 360-degree rotations.
  • Achieving maximum image quality through per-pixel filtering with bi-cubic interpolation.
  • Utilizing industry-standard interfaces to ease the integration into your FPGA design.

Key Features

  • Arbitrary warp transforms and rotations.
  • Highly-optimized external memory interface.
  • High quality per-pixel bi-cubic interpolation.
  • Coefficient sets available for the highest filter quality.
  • Full data buffering to allow input and output to operate on independent clock domains.
  • Support for 10-bit per color component.
  • Support up to 2 pixels in parallel per clock processing.
  • Support resolutions up to 3840 × 2160 at 60 fps and future support for up to 8K at 60 fps.
  • Low FPGA resource utilization.
  • AXI4-Stream video I/O interface.
  • AXI4-Stream ↔ Avalon® stream interface protocol converters.
  • Avalon® memory-mapped CPU control and memory interfaces.
  • Includes software driver, warp data and mesh generator on its delivery.
  • Free Intel® FPGA IP Evaluation Mode.
  • Design example available.

Block Diagram

Warp Intel® FPGA IP Block Diagram

Technical Specifications

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