Video Rotation Function

Overview

The VPC-4 is a video rotator for converting landscape rasters to portrait format and for converting portrait rasters to landscape format. In addition to rotation by 0, 90, 180 or 270 degrees, optional image mirroring is also supported. The VPC-4 can be used standalone or in conjunction with the VPC-1 Deinterlacer and VSC-1 Scaler IP cores to provide a complete portrait display solution. When used in conjunction with the VPC-1 Deinterlacer, the memory interface can be shared to allow for concurrent deinterlacing, scaling and rotation on a single bus.

The VPC-4 is available with complete Verilog source code and Verilog test bench as part of the license. Integration and programming guidelines are also included backed up by expert technical support.

A VPC-4 reference design is available for standard development kits from Xilinx and Altera for demonstration and evaluation purposes. The design includes a built-in user interface with embedded OSD to simplify access to key features of the IP. In addition to simplifying the evaluation of the VPC-4 IP core, the design also serves as a template for customer application development.

Key Features

  • General
    • The following input formats are supported: 480p, 540p, 576p, 720p, 1080p, 1200p and other custom formats
    • 8/10/12-bit 4:4:4 processing
    • Interfaces directly to FPGA based memory controllers
    • Memory interface can be shared with VPC-1 Deinterlacer to allow for concurrent deinterlacing, scaling and rotation on a single bus
    • 1 frame latency
  • Rotation
    • 0, 90, 180 and 270 degree rotation modes
    • Optional output mirroring for a total of 8 possible conversion modes
    • For the 90 and 270 degree rotation modes, a raster of size MxN is converted to a raster of size NxM
  • Applications
    • Video format conversion for portrait displays
    • Mobile and handheld devices
  • Compatibility
    • Use standalone or in conjunction with VPC-1 Deinterlacer and/or VSC-1 Scaler IP cores
    • Support for both Xilinx and Altera devices

Block Diagram

Video Rotation Function Block Diagram

Deliverables

  • Synthesizable Verilog RTL source code
  • Verilog testbench
  • Verification test suite
  • Product documentation
  • Integration guidelines
  • Integration support

Technical Specifications

Availability
Q2 2014
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Semiconductor IP