The Intel® FPGA Video and Vision Processing Suite is a collection of next-generation Intel® FPGA intellectual property (IP) functions that you can use to facilitate the development of custom video and image processing designs. These Intel® FPGA IP functions are suitable for use in a wide variety of image processing and display applications, such as studio broadcast, video conferencing, AV networking, medical imaging, industrial inspections and robotics, smart city/retail and consumer.
The Video and Vision Processing (VVP) Suite features IPs that range from simple building block functions such as clocked video and genlock suite, color space conversion, and mixer to sophisticated processing functions that can implement programmable scaling, arbitrary non-linear distortion correction, 3D look-up table, adaptive tone mapping and many more.
Video and Vision Processing Suite Intel FPGA IP Functions
|
Intel FPGA IP Function |
Description |
|---|---|
|
Clocked Video Input (CVI) and Clocked Video Output (CVO) |
The Clocked Video Interface IPs convert clocked video formats (such as BT656, BT1120, and DVI) to AXI4-Streaming video; and vice versa. |
|
Full-Raster to Clocked Video Converter |
Remaps pixel data and video timing information from Intel FPGA streaming full-raster protocol to clocked video format. |
|
Clocked Video to Full-Raster Converter |
Remaps pixel data and video timing information from clocked video format to Intel FPGA streaming full-raster protocol. |
|
Full-Raster to Streaming Converter |
Provides a seamless conversion between Intel FPGA streaming full-raster and Intel FPGA streaming video lite protocols. |
|
Video Broadcaster |
Broadcasts a single input video bus (in multiple formats) to multiple destinations. |
|
Video Crosspoint |
Routes discrete signals around an FPGA design under software control. An M inputs to N outputs data crosspoint for single bit signals. |
|
Genlock Router / Profiler |
Multi-channel genlock strobe extractor and router. This IP allows passing genlock timing signals to internal or external FPGA multi-rate video clock generators, to facilitate video input and output clock genlock and/or frame synchronization, based on video timing markers derived from video connectivity IP. |
|
Video Timing Generator |
Generates real-time video timing signals according to Full-Raster or Clocked Video standards. |
|
Test Pattern Generator |
Generates a video stream that contains a test pattern. |
|
Clipper |
Crops an active area from a video stream and discards the remainder. |
|
3D LUT |
Provides an efficient solution for video color space and dynamic range conversions, chroma-keying, and the creation of artistic effects. |
|
Warp |
Applies geometric corrections and arbitrary non-linear distortions to a real-time video stream. |
|
Tone Mapping Operator |
Corrects poorly exposed images and video to reveal invisible details. |
|
Scaler |
Resizes input video stream to produce output of a different height and or width. |
|
2D FIR Filter |
Implements a 3x3, 5x5, or 7x7 finite impulse response (FIR) filter on an image data stream to smooth or sharpen images. |
|
Switch |
Allows video streams to be switched in real time. |
|
Mixer |
Allows you to overlay video fields from multiple inputs on each other, either with or without alpha blending (transparency). Mixer is used for implementing text overlay and picture-in-picture mixing. |
|
Chroma Resampler |
Converts between the different chroma sampling formats available in the YCbCr color space, for example from 4:2:2 to 4:4:4 or 4:2:2 to 4:2:0. |
|
Color Space Converter |
Converts video data between color spaces such as RGB to YCbCr. |
|
Video Frame Buffer |
Buffers video frames into external RAM. This IP supports double or triple-buffering with a range of options for frame dropping and repeating. |
|
Protocol Converter |
Converts between three interface protocols: Avalon streaming video, Intel FPGA streaming video lite variant and Intel FPGA streaming video full variant. |
|
Pixels in Parallel Converter |
Allows multiple pixels to be transmitted in a single clock cycle (beat). Converts from one value of pixels in parallel at the input interface to a higher or lower number of pixels in parallel at the output interface. |
|
Guard Bands |
Compares each color plane in the input video stream to upper and lower guard bands values. It replaces the pixel value falling outside of the guard bands by the respective guard band values. |
|
Video Streaming FIFO |
Provides a FIFO buffer storage solution with input and output interfaces compliant to the Intel FPGA streaming video protocol. |
|
Deinterlacer |
Converts interlaced video formats to progressive video format using a deinterlacing algorithm. Currently only supports "bob" algorithm ("weave," low-angle edge detection, 3:2 cadence detection and motion adaptive to be added in future). |
|
Frame Cleaner |
Removes and repairs the non-ideal sequences and error cases present in the incoming data stream to produce an output stream that complies with the implicit ideal use model. |
|
Color Plane Sequencer |
Changes how color plane samples are transmitted across the Intel FPGA video streaming protocol. This function can be used to split and join video streams, giving control over the routing of color plane samples. |
|
Gamma Corrector |
Allows video streams to be corrected for the physical properties of display devices. |
|
Interlacer |
Converts progressive video to interlaced video by dropping half the lines of incoming progressive frames. |
| Chroma Key | Appends an additional alpha plane to each incoming pixel of video data. The alpha value attached is either constant or conditional depending on pixel value. This IP in conjunction with Mixer IP enables Chroma Key applications. |
| Stream Cleaner | Fixes broken streams of video. |
