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VESA DSC Encoder and Decoder IP Solutions

Overview

Synopsys VESA Display Stream Compression (DSC) Encoder and Decoder IP provides a video compression solution for up to 10K ultra-high-definition displays over HDMI 2.1, MIPI DSI, and VESA DisplayPort links. The IP enables designers to incorporate visually lossless data compression between the SoC and display to maximize video bandwidth and optimize power, and area for mobile, automotive, and AR/VR applications. Synopsys VESA DSC IP, consisting of encoder and decoder, is compliant with the latest VESA DSC 1.2a and 1.1 specifications.

Synopsys MIPI DSI Host Controller IP with VESA DSC encoder together with Synopsys MIPI D-PHY and C-PHY/D-PHY IP provide a complete, interoperable display solution, enabling designers to lower their risk and cost of integrating the IP into application processors, display bridge integrated circuits (ICs) and multimedia coprocessors.

Benefits

  • Compliant with the VESA DSC 1.2a and 1.1 specifications
  • Supports all DSC video formats: RGB, YCbCr, native 4:2:2/4:2:0, simple 4:2:2
  • Supports the latest interface standards: HDMI 2.1, MIPI DSI, DisplayPort
  • Configurable IP delivers low-power and small area
  • Multiple slice decoding: 1, 2, 4, 8, 12, 16
  • Precision: 8, 10, 12, 14, 16 bits
  • Selection of coding schemes (MMAP, BP, MPP, ICH)
  • Single port RAM-based buffers
  • Picture Parameter Set (PPS)
  • Highly programmable with APB-3 based
  • register interface
  • Error reporting for robust auto-recovery

Technical Specifications

Maturity
Available on request
Availability
Available
Request Info

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