Verification IP for HDMI

Overview

A comprehensive VIP solution for HDMI 2.0 source and sink designs. HDMI-Xactor implements a complete set of models, protocol checkers and compliance test suites in 100% native SystemVerilog and UVM.

Specifications

Protocol Family	Standard Organization	Models
HDMI	HDMI	HDMI 2.1
		HDMI CTS 2.1b Source/Sink
		HDMI CTS 2.1c Repeater

Key Features

Support of standards from HDMI.org and VESA
HDMI revision 2.0b, CEA-861-F, E_EDID_Standard, DSC 1.2, EDDC revision 1.0
CTS 2.0b/1.4b test suite
Verification of both transmitter/source and receiver/sink and PHY designs
Automated dynamic video and audio traffic generation and PHY bit rate clock generation delivering fully accurate frame synchronization timing of multiple video and audio sources based on various shaping parameters including random receiver/sink device peripheral parameter set, interleaved/multiple packet control, interleaved frames control, line and frame blanking intervals
Standard DSC extensions
Comprehensive protocol checking and coverage reports
Protocol analyzer tracker report at all layers
Error injection and scoreboarding supported through Automated Frame Generation common callback for layer-specific

Inspection and error injection using methods to in-line
Modify, drop, inject packet ahead/behind, force next state
Standards-based and custom Avery Conformance test suites
Data Island transmissions with different packet types
Enhanced DDCe
E-EDID and E-EDID extension block
Dynamic Vparameter selection
3D video extensions
3D, multi-stream, and infoframe audio generation
Status and control data channel
Dynamic audio lipsync
CEC discovery, polling messages, power state and vendor message

Deliverables

HDMI BFM
Compliance test suite
User guide

Technical Specifications

Short description

Verification IP for HDMI

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Verification IP for HDMI

Overview

Key Features

Deliverables

Technical Specifications

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