Verification IP for FlexRay

Overview

A comprehensive VIP solution for multiple versions of the FlexRay standard used by SoC and IP designers to ensure comprehensive verification and protocol and timing compliance. FlexRay-Xactor implements a complete set of models, protocol checkers and compliance testsuites in 100% native SystemVerilog and UVM.

Specifications

Protocol Family 

Standard Organization 

Sub Protocol 

Models 

FLEXRAY 

FlexRay Consortium 

 

V2.1A, V3.0.1 

Key Features

  • Support for Node and Star BFMs
  • Node-level and global parameter class support
  • Single and dual channel active star and passive bus topologies
  • Synchronization methods (TT-D, TT-E, TT-L)
  • Static slot (TDMA) and dynamic minislot (FTDMA) segment media access schemes and media arbitration
  • Local/Remote wakeup and startup
  • Macrotick cluster-wide clock synchronization
  • Automatic error handling
  • Random configuration
  • Node type, bit timing rate, time base, jitter
  • Error injection/Callbacks
  • Protocol Checking
  • Protocol Analyzer log
  • Compliance testsuite
  • Verified with multiple IP vendors

Deliverables

  • Flexray BFM
  • Compliance testsuite
  • User guide

Technical Specifications

Short description
Verification IP for FlexRay
Vendor
Vendor Name
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Semiconductor IP