Verification IP for CSI/DSI/C-PHY/D-PHY

Overview

A comprehensive VIP solution for CSI-2, DSI-2, D-PHY and C-PHY transmitter and receiver designs. CSI/DSI-Xactor implements a complete set of models, protocol checkers and compliance testsuites in 100% native SystemVerilog and UVM.

Specifications

Protocol Family 

Standard Organization 

Sub Protocol 

Models 

CSI 

MIPI 

 

CSI-2 v4.0 

     

CSI-2 TX/RX CTS v3 

DSI 

MIPI 

 

DSI-2 v2.0 

     

DSI-2 CTS v1.1 

C-PHY 

MIPI 

 

C-PHY v2.1 

     

C-PHY v2.0 CTS 1.0 

D-PHY 

MIPI 

 

D-PHY v3.0 

     

D-PHY v2.1 CTS v1.1 

A-PHY 

MIPI 

 

A-PHY v1.0 

Key Features

  • Verification of both transmitter/source and receiver/sink and PHY designs DSI-2 with C-PHY and D-PHY, CSI-2 with C-PHY and D-PHY
  • Automated dynamic video and audio traffic generation and PHY bit rate clock generation delivering fully accurate frame synchronization timing of multiple video and audio sources based on various shaping parameters including random receiver/sink device peripheral parameter set, interleaved/multiple packet control, interleaved frames control, line and frame blanking intervals
  • Standard DSC extensions
  • Comprehensive protocol checking and coverage report
  • Functional traffic, error and operational and power modes coverage
  • Standard DSC extensions
  • Comprehensive protocol checking and coverage reports
  • Protocol analyzer tracker report at all layers
  • Error injection and scoreboarding supported through automated frame generation common callback for layer-specific
  • Inspection and error injection using methods to in-line
  • Modify, drop, inject packet ahead/behind, force next state
  • Standards-based and custom Avery Conformance test suites
  • Verified with multiple IP vendor partner
  • Perform receiver configuration
  • Execute sleep modes including SLM sequence
  • Perform receiver error detection
  • DSI-2 DSC 1.1 supported
  • CSI-2 data compression for RAW data types supported
  • CSI TX/RX and C-PHY/D-PHY Conformance tests
  • D-PHY and C-PHY model support TX and RX HS, LP, and FEN, CNN
  • System power-up and initialization
  • Bidirectional signaling control mode and video mode systems
  • Read, ACK, error reporting
  • Forward escape ULPS for sleep modes
  • Multi-lane distribution and merging
  • Multi-lane interoperability (TX X-lanes, RX Y-lanes)
  • D-PHY specific deskew calibration including bypass and periodic
  • C-PHY specific enable/Disable 3-phase encoding

Deliverables

  • CSI-2 BFM
  • DSI-2 BFM
  • C-PHY BFM
  • D-PHY BFM
  • Compliance test suite
  • User guide

Technical Specifications

Short description
Verification IP for CSI/DSI/C-PHY/D-PHY
Vendor
Vendor Name
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Semiconductor IP