Verification IP for CAN XL, FD and CAN 2.0

Overview

A comprehensive VIP solution portfolio for CAN XL, CAN FD and CAN 2.0 used by SoC and IP designers to ensure comprehensive verification, protocol and timing compliance. CAN-Xactor implements a complete set of models, protocol checkers and compliance test suites in 100% native SystemVerilog and UVM.

Specifications

Protocol Family 

Standard Organization 

Sub Protocol 

Models 

CAN FD 

CiA 

 

601-1 v2 

 

CiA 

 

601-2 v1 

 

CiA 

 

601-3 v1 

 

CiA 

 

601-4 v2 

 

ISO 

 

16845-1 

TTCAN 

ISO 

 

11898-4 

CAN XL 

CiA 

 

610-1 v0.0.3 

 

CiA 

 

610-2 v0.0.1 

 

CiA 

 

610-3 v0.0.10 

Key Features

  • CAN node model supports integration steps, transmitter and receiver modes including multiple bit rates, inter-frame delay, and bit phase delay adjustment, APIe to preload and access sparse memory regions
  • Supports random configuration of node type, bit timing rate
  • Frame class models all frame formats and types
  • Open and unencrypted timing class models all timing parameters (randomize, modifiable)
  • Error detection (callback, bit stuffing) and injection
  • Comprehensive protocol and timing checks
  • Avery and Bosch compliance testsuites
  • Tracker log monitors all levels and improves debug

Technical Specifications

Short description
Verification IP for CAN XL, FD and CAN 2.0
Vendor
Vendor Name
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Semiconductor IP