USB 3.0 PHY

Overview

The USB 3.0 PHY is a complete, mixed-signal semiconductor intellectual property (IP) solution, designed for single-chip integration into USB 3.0 SuperSpeed applications. The USB 3.0 PHY, usb3_sspxN_hspxN, includes all the necessary logical, geometric, and physical design files to implement complete USB 3.0 physical layer capability, connecting a USB OTG controller, host controller, or device controller to a USB system. The USB 3.0 PHY supports the USB 3.0 SuperSpeed (5 Gbps) protocol and data rate and is backward compatible with USB 2.0 high-speed (480 Mbps), full-speed (12 Mbps), and low-speed (1.5 Mbps) protocols and data rates.

Key Features

  • ? 5-Gbps SuperSpeed data transmission rate through 3-m USB 3.0 cable
  • ? Spread Spectrum clock (SSC) generation and absorption
  • ? Down-spread is programmable from –4,980 ppm through 4,980 ppm
  • ? PIPE 3-compliant SuperSpeed USB 3.0 Transceiver interface
  • ? Configurable using soft PCS layer above hard macro PHY
  • ? Supports 8-bit interface at 500-MHz operation, 16-bit interface at 250-MHz operation, and 32-bit interface
  • at 125-MHz operation
  • ? Supports SuperSpeed power-down modes: U0, U1, U2, and U3
  • ? Integrated PHY includes transmitter, receiver, SSC generation, PLL, digital core, and ESD
  • ? Adaptive Rx equalization
  • ? Supports all USB 3.0 test modes
  • ? Designed for excellent performance margin and receiver sensitivity
  • ? Robust PHY architecture tolerates wide process, voltage, and temperature variations
  • ? Low-jitter PLL technology with excellent supply isolation
  • ? IEEE standards 1149.1 and 1149.6 (JTAG) boundary scan for internal visibility and control

Deliverables

  • We offer high-speed interface IPs designed for 28~90nm fabrication processes in various foundries. We can also customize porting IPs for customers requiring 90~180nm fabrications and support more advanced processes as needed.

Technical Specifications

Foundry, Node
TSMC,40,55,65; SMIC,28,40,55,65; GF,40,55,65; UMC,40,65
Maturity
Silicon Proven; Design Ready(SMIC,28)
Availability
Immediate
GLOBALFOUNDRIES
Silicon Proven: 40nm LP , 55nm , 65nm LPe
SMIC
Silicon Proven: 40nm LL , 65nm LL
TSMC
Silicon Proven: 40nm G , 40nm LP , 55nm LP , 65nm LP
UMC
Silicon Proven: 40nm , 65nm LL
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Semiconductor IP