USB 2.0 PHY

Overview

Compliant with USB2.0 and USB1.1 specification

Compliant with USB2.0 and USB1.1 specification
Compliant with UTMI Specification Version 1.0
Supports HS(480Mbps)/FS(12Mbps) /LS(1.5Mbps) modes
USB Data Recovery and Clock Recovery on receiving
SYNC and EOP generation on transmit packets and detection on receive packets
16-bit, 30MHz or 8-bit, 60MHz parallel interface for HS/FS
Serializing for transmitting data stream and De-serializing for receiving data stream
Integrated Bit Stuffing and NRZI encoding for Transmit
Integrated Bit Un-Stuffing and NRZI decoding for Receive
Supports termination calibration with external resister
Supports scan test of digital block
Built in self test for production testing
Supports USB suspend state and remote wakeup
Supports detection of USB reset, suspend and resume signaling
Supports high speed identification and detection as defined by USB 2.0 Specification
Support high speed host disconnection detection
Ultra low power, typically:
25 mW during HS Mode
9 mW during HS-idle
SMIC 14nm SF+/SF++ FinFET 1P8M/9M/10M/11M process

Short description

USB 2.0 PHY

Vendor

Vendor Name

Foundry, Node

SMIC 14nm SF+/SF++

SMIC

Silicon Proven: 14nm