USB 2.0 OTG PHY IP, UMC 65nm LL process
Overview
USB2.0 OTG PHY (VDT and ID are included in PHY), UMC 65nm low leakage RVT Low-K process.
Technical Specifications
Foundry, Node
UMC 65nm LL
UMC
Pre-Silicon:
65nm
LL