USB 2.0 DEVICE Transceiver is a fully integrated PHY Core which is a super-set of DEVICE PHY with High Speed (HS), Full-Speed (FS) and Low-Speed Transceivers and is compliant with the USB 2.0 and USB 1.1 Specifications. It includes Clock/Data Recovery, on-chip PLL, Integrated & Calibrated Termination and Pull-Up Resistors with full Analog Transceiver functionality for the Complete USB 2.0 PHY as illustrated in the figure. USB2 DEVICE Transceiver has standard UTMI so that ASIC vendors are isolated from the high speed and analog circuitry associated with the transceiver, thus reducing the design risk and speeding the design cycle.
The core’s main blocks are clock/data recovery for FS/HS, PLL, transceiver state machines, data encoder/decoder and high-speed analog transceiver as can be seen in the main block diagram above.
