USB 2.0 Device Controller version 4 with Active Clock Gating to save active power

Overview

The vendor provides designers with silicon-proven, configurable USB 2.0 Controllers that are compliant with the USB-Implementers Forum (USB-IF) USB 2.0 specifications. The digital controllers provide: the lowest gate count; power management optimized with dual power rails; and a ULPI interface for discrete PHYs and UTMI/UTMI+ interface for integrated PHYs. This comprehensive solution includes the USB 2.0 LPM-HSIC, OTG, Host and Device Controllers.

The USB 2.0 IP is the most certified IP solution in the industry. With thousands of design wins and billions of silicon-proven units shipped, the vendor's complete USB IP solution, consisting of digital controllers, PHY and Verification IP, enables designers to lower integration risk and speed time-to-market.

The vendor optimized the USB 2.0 Controllers for low power, small area and ease-of-integration, such as is required in Internet of Things (IoT) applications.

Key Features

  • Configuration options to maximize performance and minimize CPU interrupts
  • Flexible parameters enable easy integration into low and high-latency systems
  • Transfer- or transaction-based processing of USB data based on system requirements
  • Configurable data buffering options to fine-tune performance/ area trade-offs
  • Buffer and descriptor pre-fetching maximizes host throughput
  • Firmware-selectable endpoint configurations enable post-silicon application changes and the flexibility of one-chip design for multiple applications
  • Quality IP is tested through extensive Constrained Random Verification
  • AMBA™ High-Performance Bus (AHB) interface enables rapid integration into ARM-based designs
  • UTMI+ Level 3 enables rapid integration with compatible PHYs
  • Hi-Speed (480 Mbps), Full-Speed (12 Mbps), and Low- Speed (1.5 Mbps) operation is compliant to the USB OTG Supplement
  • The USB 2.0 HS OTG Controller operates as either peripheral or host
  • The Hi-Speed USB EHCI Host Controller is also available

Block Diagram

USB 2.0 Device Controller version 4 with Active Clock Gating to save active power Block Diagram

Technical Specifications

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Semiconductor IP