USB 2.0 Device Controller

Overview

The DUSB2 is hardware implementation of full/high-speed peripheral controller that interfaces to the UTMI bus transceiver. The DUSB2 contains the USB PID and address recognition logic, state machines to handle USB packets and transactions, endpoints number recognition logic and endpoints FIFO control logic. The DUSB2 is designed to support 12 Mb/s "Full Speed" (FS) and 480 Mb/s "High Speed" (HS) serial data transmission rates. The design is technology independent and thus can be implemented in a variety of process technologies. This core strictly conforms to the USB Specification v2.0. The DUSB2 core is delivered with fully automated test bench and complete set of tests, allowing easy package validation at each stage of SoC design flow.

Key Features

  • Full compliance with the USB 2.0 specification
  • Full-speed 12 Mbps operation
  • High-speed 480 Mbps operation
  • Software configurable EP0 control endpoint size 8-64 bytes
  • Software configurable 15 IN/OUT end-points:
    • configurable number of endpoints
    • configurable type of each endpoint: INTERRUPT, BULK or ISOCHRONOUS
    • configurable direction of each endpoint
    • configurable size of each endpoint: 8-1024 bytes
  • Supports UTMI Transceiver Macrocell Interface
  • Synchronous RAM interface for FIFOs
  • Suspend and resume power management functions
  • Simple interface allows easy connection to CPU
  • Allows operation from a wide range of CPU clock frequencies
  • Fully synthesizable
  • Static synchronous design
  • Positive edge clocking
  • No internal tri-states
  • Lite design, small gate count and fast operation
  • Scan test ready

Applications

  • Human Interface Devices like keyboards, mouse or game peripherals
  • Mass Storage devices like flash disk, mp3 or mp4 player
  • GPS navigation system
  • Digital Camera
  • Cellular phone
  • Audio devices like microphone or speakers
  • Printer
  • Scanner

Deliverables

  • HDL Source Code
  • Testbench environment
    • Automatic Simulation macros
    • Tests with reference responses
  • Synthesis scripts
  • Technical documentation
  • 12 months of technical support

Technical Specifications

Availability
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Semiconductor IP