UMC 55nm eFlash process process ULL ROM Memory Compiler
Overview
UMC 55nm eFlash process process ULL ROM Memory Compiler
Technical Specifications
Foundry, Node
UMC 55nm eNVM EFLASH/EE2PROM/LP-SPLIT_GATE
UMC
Pre-Silicon:
55nm
Related IPs
- Single Port SRAM Compiler IP, UMC 65nm SP process
- HHGrace 0.11um ULL Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Diffusion ROM Compiler
- Silterra 0.18um ULL Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Via ROM Compiler
- Silterra 0.11um ULL Single-Port/Dual-Port SRAM, Single-Port Register File and Via ROM Compiler
- SMIC 0.15umLV Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Diffusion ROM Compiler
- CSMC 0.13um Generic Process Programmable Gain Amplifier