UMC 40nm embedded high voltage (eHV) low power Process standard synchronous high density single port register file SRAM memory compiler.
Overview
UMC 40nm embedded high voltage (eHV) low power Process standard synchronous high density single port register file SRAM memory compiler.
Technical Specifications
Foundry, Node
UMC 40nm
UMC
Pre-Silicon:
40nm
,
40nm
LP
Related IPs
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- Single Port Register File compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 40 k
- Single Port Register File compiler - Memory optimized for high density and speed - Dual Voltage - Compiler range up to 40 kbits
- Single Port Register File compiler - Memory optimized for high density and high speed - Dual voltage - compiler range up to 40 k
- Single Port Register File compiler - Memory optimized for high density and high speed - compiler range up to 40 k