UMC 28nm HPC process PG Two Port Register File with peri-HVT
Overview
UMC 28nm HPC process PG Two Port Register File with peri-HVT
Technical Specifications
Foundry, Node
UMC 28nm Logic/Mixed_Mode HPC
UMC
Pre-Silicon:
28nm
HLP
,
28nm
HPC
,
28nm
HPM
,
28nm
LP
Related IPs
- Two Port Register File compiler - Memory optimized fore high density and high speed - compiler range up to 320 k
- Two Port Register File compiler - Memory optimized fore high density and high speed - compiler range up to 320 k
- Two Port Register File compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 64 k
- Two Port Register File compiler - Memory optimized for high density and low power optimized - compiler range up to 40 k
- Two Port Register File compiler - Memory optimized for high density and low power optimized - compiler range up to 40 k
- Two Port Register File compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 64 k