UMC 28nm HPC Logic Process Via ROM Low Power Compiler with HVT peripheral
Overview
UMC 28nm HPC Logic Process Via ROM Low Power Compiler with HVT peripheral
Technical Specifications
Short description
UMC 28nm HPC Logic Process Via ROM Low Power Compiler with HVT peripheral
Vendor
Vendor Name
Foundry, Node
UMC 28nm
UMC
Pre-Silicon:
28nm
HLP
,
28nm
HPC
,
28nm
HPM
,
28nm
LP
Related IPs
- Single Port SRAM Compiler IP, UMC 65nm SP process
- CMM lane operating from 1.25G~8G ,UMC 28nm HPC Process
- Analog part of TX+RX lane operating at 1.25G~8Gbps , UMC 28nm HPC Process
- UMC 55nm ULP process ROM compiler with HVT peripheral
- <4Gbps Low Power D2D Interface in TSMC 16nm & 28nm
- Low Power Memory Compiler - Single Port SRAM - GF 22nm FDX