UMC 28HPC process standard synchronous high density TCAM memory compiler
Overview
UMC 28HPC process standard synchronous high density TCAM memory compiler
Technical Specifications
Foundry, Node
UMC 28nm
UMC
Pre-Silicon:
28nm
HLP
,
28nm
HPC
,
28nm
HPM
,
28nm
LP
Related IPs
- Single Port SRAM Compiler IP, UMC 65nm SP process
- SMIC 0.13um Low Leakage high density RVT_x005F_x000D_ Logic standard cell library.
- Single Port Register File compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 40 k
- Single Port Register File compiler - Memory optimized for high density and speed - Dual Voltage - Compiler range up to 40 kbits
- Two Port Register File compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 64 k
- Dual Port SRAM compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 72 k