UMC 0.45um Logic process standard gate array asynchronous metal programmed ROM memory compiler.
Overview
UMC 0.45um Logic process standard gate array asynchronous metal programmed ROM memory compiler.
Technical Specifications
Short description
UMC 0.45um Logic process standard gate array asynchronous metal programmed ROM memory compiler.
Vendor
Vendor Name
Foundry, Node
UMC 0.45um
Maturity
Mass production proven
Related IPs
- UMC 0.45um Logic process standard gate array asynchronous embedded array high density two port (1R1W) SRAM memory compiler.
- UMC 0.45um Logic process standard gate array asynchronous high density single port SRAM memory compiler.
- Single Port SRAM Compiler IP, UMC 65nm SP process
- Metal programmable ROM compiler - Memory optimized for low power - Dual Voltage - compiler range up to 1024 k
- Metal programmable ROM compiler - Memory optimized for low power and high density - Dual Voltage - compiler range up to 1024 k
- Metal programmable ROM compiler - Memory optimized for low power and high density - compiler range up to 1024 k