UMC 0.45um Logic process standard gate array asynchronous high density single port SRAM memory compiler.
Overview
UMC 0.45um Logic process standard gate array asynchronous high density single port SRAM memory compiler.
Technical Specifications
Foundry, Node
UMC 0.45um Logic/Mixed_Mode Generic
Related IPs
- Single Port SRAM Compiler IP, UMC 65nm SP process
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- Single Port SRAM compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 320 k
- Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 640 k