UMC 0.18um Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Diffusion ROM Compiler

Overview

VeriSilicon UMC 0.18um High-Speed Synchronous Memory Compiler optimized for United Microelectronics Corporation (UMC) 0.18um Logic 1P6M Generic II Salicide 1.8/3.3V process can flexibly generate memory blocks via a friendly GUI or shell commands.
The compiler supports a comprehensive range of word and bit lengths. While satisfying speed and power requirements, it has been optimized for area efficiency.
VeriSilicon UMC Synchronous Memory Compiler uses four layers within the blocks and supports metal 4, 5, or 6 as the top metal. Dummy bit cells are synthesized with the intention to enhance reliability.

Key Features

  • High Density
  • High Speed
  • Size Sensitive Self-Time Delay for Fast Access
  • Automatic Power Down
  • Tri-State Output(SRAM only)
  • Write Mask Function(SRAM & Register File)

Technical Specifications

Foundry, Node
UMC 0.18um
Maturity
Silicon Proven
UMC
Pre-Silicon: 180nm
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Semiconductor IP