UMC 0.18um IO Library
Overview
UMC 0.18um process 1.8v/3.3v Generic IO library
Key Features
- UMC 0.18um Logic 1P6M Salicide 1.8V/3.3V Process.
- 3.3V I/O, 1.8V Core, 5V Tolerant.
- Both Inline and Stagger Compatible IO Pads.
- Configurable Input-Output and Skew Rate Control.
- Robust ESD (>2000V) and Latch-up Immunity (+/-200 mA).
Technical Specifications
Foundry, Node
UMC 0.18um
Maturity
Silicon proven
UMC
Pre-Silicon:
180nm
Related IPs
- GSMC 0.18um Low Power 9track Standard Cell Library, 1.8v operating voltage
- GSMC 0.18um 3.3V Standard Cell Library, 3.3v operating voltage
- GSMC 0.18um Ultra Low Leakage 9track Standard Cell Library, 1.8v operating voltage
- UMC 0.18um 9track Standard Cell Library, 1.8v operating voltage
- CSMC 0.18um Standard Cell Library, 1.8v operating voltage
- CSMC 0.18um Clock Gating Cell Library, 1.8v operating voltage