ULP 32.768kHz oscillator in Silterra 0.18 um

Overview

This macro-cell is an ultra-low power, general purpose 32.768kHz internal oscillator core aimed for RTC (real time clock) applications.

A 6-bit digital bus allows frequency adjustment against process variations. It has self-biased, built-in references and doesn’t require external ones. The core is easily retargeted to any other CMOS technology due to its MOSFET-only oscillator architecture.

Key Features

  • 32.768kHz ±5.1%
  • ULP ( Ptot < 1.3uW )
  • Low TC
  • 6-bit trimming
  • Self-biased, built-in references
  • Area: 0.032 um2 (153 µm x 210 µm)

Block Diagram

ULP 32.768kHz oscillator in Silterra 0.18 um Block Diagram

Technical Specifications

Short description
ULP 32.768kHz oscillator in Silterra 0.18 um
Vendor
Vendor Name
Foundry, Node
Silterra 0.18 um
Maturity
GDS Available
Silterra
Pre-Silicon: 180nm
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Semiconductor IP