The UHD Serial Digital Interface (UHD-SDI), is widely used in broadcast applications for the transport of uncompressed digital video streams up to 4K resolutions over coax cable. The LogiCORE™ IP UHD- SDI interface solution provides receiver and transmitter interfaces for the SMPTE SD-SDI, HD-SDI, 3G-SDI, 6G-SDI and 12G-SDI standards.
The UHD SDI LogiCORE IP can be implemented in Xilinx 7-series and UltraScale FPGAs. Users can implement one to many 4K processing channels including capture and display on a single FPGA using UHD-SDI IP and Video processing cores from Xilinx and its partners. The UHD SDI LogiCORE IP is designed based on applicable SMPTE standards (SMPTE ST-2081 and SMPTE ST-2082 drafts defining 6G and 12 G interfaces).
UHD Serial Digital Interface (UHD-SDI)
Overview
Key Features
- SMPTE ST 259: SD-SDI at 270 Mb/s
- SMPTE RP 165: EDH for SD-SDI
- SMPTE ST 292: HD-SDI at 1.485 Gb/s and 1.485/1.001 Gb/s
- SMPTE ST 372: Dual Link HD-SDI (by instantiation of two UHD-SDI cores)
- SMPTE ST 424: 3G-SDI with data mapped by any ST 425-x mapping at 2.97 Gb/s and 2.97/1.001 Gb/s.SMPTE ST 2081-1: 6G-SDI with data mapped by any ST 2081-x mapping at 5.94 Gb/s and 5.94/1.001 Gb/s (including multi-link 6G-SDI)
- SMPTE ST 2082-1: 12G-SDI with data mapped by any ST 2082-x mapping at 11.88 Gb/s and 11.88/1.001 Gb/s (including multi-link 12G-SDI)
- Dual link and Quad link 6G-SDI and 12G-SDI are supported by instantiating two or four UHD-SDI cores
Technical Specifications
Related IPs
- Multi-Rate Serial Digital Interface (SDI) PHY Layer
- Tri-Rate Serial Digital Interface (SDI) Physical Layer (PHY)
- PHY layer solution for PCIe1.1/PCIe2.0 with a serial interface and PIPE3 compliant digital interface
- ISO/IEC 7816-3 digital controller for interface device compliant with ETSI TS 102 221 and EMV 2000 standards
- Serial Peripheral Interface – Master/Slave with Octal, Quad, Dual and Single SPI Bus support
- UART Serial Interface Controller