Synopsys I3C I/O library supports a simplified system of connecting and managing multiple sensors in a device. Multiple sensor secondary devices can be controlled by one I3C primary device at a time. It offers backward compatibility with I2C legacy devices, is designed for high I/O voltage domains and supports low-core voltage domains. The I3C incorporates the Schmitt-Trigger function, supports I2C Legacy Fast Mode and FM+ Mode, and includes HBM and CDM ESD protection. We provide an interoperable validated I3C I/O solution with our in-house Synopsys I3C controllers. The library supports independent power sequencing with the support of a power management cell from our base libraries. The Synopsys I3C I/O specifications align with the latest JEDEC standards and support:
Push-pull (12.5 MHz) and Open drain I3C modes (1MHz)
I2C Legacy Fast Mode (400KHz) and Fm+(1MHz) Mode
TSMC 3nm (N3E) 1.2V/1.8V I3C Libraries
Overview
Key Features
- Support Schmitt trigger
- 50 ns filter for spike rejection
- Automotive G1/G2 supported, ASIL-B certified
- Silicon-validated IP
- Interoperable validated I3C I/O solution with our in-house Synopsys I3C Controllers
- HBM 2KV, CDM 500V(up to 7A), Latch-up +/-100 mA @ 125C
- Designed to support multiple metal stack options
- Support for flip-chip & wirebond packaging
- Silicon-proven solution
Technical Specifications
Foundry, Node
TSMC 3nm - EFF
Availability
Contact the Vendor
TSMC
Pre-Silicon:
3nm
Related IPs
- TSMC 3nm (N3E) 1.2V/1.8V I3C Libraries, multiple metalstacks
- TSMC 3nm (N3E) 1.2V/1.8V GPIO Libraries
- TSMC 3nm (N3E) 1.2V/1.8V GPIO with 1.8V Failsafe Libraries
- TSMC 3nm (N3E) 1.2V/1.8V GPIO with 1.8V Failsafe Libraries, multiple metalstacks
- TSMC 5nm (N5) 1.2V/1.8V I3C Libraries
- TSMC 4nm (N4P) 1.2V/1.8V I3C Libraries