True Random Number Generator (TRNG)

Overview

The TRNG IP core establishes a benchmark for hardware-based security in cryptographic systems, by generating high-entropy, true random numbers essential for secure communications and cryptographic operations, such as key generation. It includes a robust and thoroughly characterised entropy source, online health tests and a proven AES-CBC-MAC-based entropy extractor.

The IP core conforms to the stringent requirements of NIST standards and widely used test suites, while offering flexibility and broad compatibility for both FPGA and ASIC designs. It is an essential component of security protocols such as TLS 1.3 and MACsec.

The TRNG core integrates robust health monitoring systems to ensure the highest level of randomness and security under any operational conditions.

It includes advanced noise reduction techniques to optimise entropy quality, further strengthening against predictability and enhancing the system's cryptographic security.

Key Features

  • Moderate resource requirements
  • Compliant with NIST SP 800-22 / SP 800-90B
  • Ready for FIPS 140-3 certification
  • AES-CBC-MAC-based entropy
  • Security features (e.g. zeroise function)
  • Passes PractRand, gjrand,TestU01, and dieharder test suites
  • Parameterisable design
  • Easy system integration
  • Vendor agnostic FPGA/ASIC implementation

Benefits

  • Moderate resource requirements with no multipliers or DSP blocks
  • Tunable entropy source
  • Additional security features
  • Easily portable fully digital design
  • Several bus interfaces available
  • IP core designed in-house at Xiphera
  • Technical support by the original designers and cryptographic experts

Block Diagram

True Random Number Generator (TRNG) Block Diagram

Applications

  • Defense and military communications
  • VPN /TLS / IPsec / MACsec implementations
  • Automotive systems
  • Wearables
  • Space and satellite applications

Deliverables

  • Encrypted RTL or source code
  • Sample synthesis scripts
  • Comprehensive simulation test bench, scripts & guide
  • Optional netlist
  • Instantiation file
  • Detailed datasheet and integration guide
  • Please contact sales@xiphera.com for pricing and your preferred delivery method

Technical Specifications

Foundry, Node
Any
Maturity
Hardware Tested
Availability
Immediate
×
Semiconductor IP