Triple-Speed (10Mbps/100Mbps/1Gbps) Ethernet Layer 2 switch compatible with IEEE 802.1D

Overview

The core of FES is a multi-gigabit forwarding engine capable of serving up to eight full-duplex gigabit Ethernet ports, thus forwarding eight gigabits of data every second. All the ports have four priority queues enabling four different priority levels. At congestion situation frames are discarded in WRED (Weighted Random Early Detection) fashion, which drops frames from low priority queues first, preserving the more important streams also during congestion. Using Store-and-Forward technique enables error-checking of the frames and eliminates the possibility of the switch forwarding broken frames, which is impossible for Cut-through type of switches. Forwarding latency is minimal, thanks to gigabit operation.

Key Features

  • Compatible with IEEE standard 802.1D ”Media Access Control (MAC) Bridges”
  • Time and frequency synchronization using IEEE1588-2008 Precision Time Protocol
  • End-to-end transparent switch functionality
  • Triple-speed Full-Duplex operation on all ports
  • Wire-speed packet forwarding
  • Reliable Store-and-Forward operation with data integrity checking
  • Ethernet packet filtering and priorization
  • 4 priority queues for each port
  • Weighted Random Early Detection (WRED) queue management
  • 512 kbit internal memory for output queues
  • Efficient internal memory management
  • Management Ethernet port
  • Rapid Spanning Tree Protocol implementation support
  • Automatic polling of connected Ethernet PHY interface chips
  • 2048 address MAC-table
  • Automatic address learning and aging

Deliverables

  • Evaluation package for LatticeECP3 PCI Express Solutions Board
  • Open source IEEE 1588 PTP protocol stack implementation and Linux software for embedded environments
  • Accelerated hardware test environment

Technical Specifications

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Semiconductor IP