Time aligned Signal Timestamper core

Overview

The Signal Timestamper from NetTimeLogic is a timestamper with nanosecond resolution (second and nanosecond format). It uses NetTimeLogic's Adjustable Clock core as source for timestamping. Together with the event to timestamp, data can be provided which will then be latched, so that the timestamp and data can be aligned with each other. Timestamps will generate an IRQ and timestamps can optionally be buffered for burst handling.

The IP core comes with a Linux Driver

Key Features

    • Signal edge timestamping
    • 32 bit second and 32 bit nanosecond timestamp
    • Optional timestamp buffer for burst handling
    • Configurable polarity
    • Input delay compensation
    • Data snapshot for timestamp alignment
    • Interrupt generation
    • Interrupt masking
    • Edge counter for event detection
    • Maximum event rate depends on CPU and AXI bus load
    • AXI4 Light register set or static configuration
    • Timestamp resolution with 50 MHz system clock: 10ns
    • Linux driver

Benefits

  • Coprocessor handling signal timestamper based on a reference time standalone in the core.
  • Simple interface

Block Diagram

Time aligned Signal Timestamper core Block Diagram

Applications

  • Distributed data acquisition
  • Ethernet based automation networks
  • Automation
  • Robotic
  • Automotive
  • Test and measurement

Deliverables

  • Source Code (not encrypted, not obfuscated)
  • Reference Designs
  • Testbench with Stimulifiles
  • Configuration Tool
  • Linux Driver
  • Documentation

Technical Specifications

Availability
Now
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Semiconductor IP