This fifo access external OnChip dual port memory to store data.

Overview

Key Features

• 1. Configurable Depth.
• 2. Configurable Width.
• 3. Configurable Clock freq.
• 4. External Dual Port Memory for Storage

Benefits

• 1. Fully stable operation.
• 2. Non-2**n depth supported.
• 3. Dip-In and Data Available support.
• 4. CDC method and CDC clock ratio selectable.
• 5. Good memory packing density help user to implement large FIFOs

Applications

• Internal IP Component Block
• can be used inside any IP/SOC.

Deliverables

• Standard Deliverables list -
• 1. Source Code in verilog.
• 2. Test Bench.
• 3. Simulation Scripts.
• 4. Synthesys scripts.
• 5. Documentation
• 6. User Guide.

Technical Specifications