Vendor: Cadence Design Systems, Inc. Category: DSP Core

Tensilica FloatingPoint KP1/KP6 DSPs

High-performance DSPs designed for floating-point-centric processing with ultra-low energy and small area Cadence® Tensilica® Flo…

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Overview

High-performance DSPs designed for floating-point-centric processing with ultra-low energy and small area

Cadence® Tensilica® FloatingPoint KP1/KP6 DSPs provide high-performance floating-point computation throughput with low energy consumption and small area footprint. The configurability and extensibility of Tensilica FloatingPoint KP1/KP6 DSPs give the SoC designers flexibility to configure a floating-point DSP that meets their performance requirements with low energy and small area budgets. Tensilica FloatingPoint KP1/KP6 DSPs are optimized for applications in battery-operated devices, AI/ML, AR/VR, motor control, smart sensors, sensor fusion, ADAS, autonomous driving, etc.

Key features

  • VLIW parallelism issuing multiple concurrent operations per cycle
  • Xtensa LX Secure Mode
  • 128-bit and 512-bit SIMD
  • IEEE 754 vector floating-point
  • Performance optimized fused multiply-add (FMA)
  • 8b/16b/32b/64b integer ALU operations
  • Optimized for FFT operations
  • Enhanced complex data processing
  • Superior auto vectorization support
  • TIE for easy extension and further performance enhancement

Applications

  • Automotive,
  • Communications,
  • Consumer Electronics,
  • Data Processing,
  • Industrial and Medical,
  • Military/Civil Aerospace,
  • Others

Specifications

Identity

Part Number
Tensilica FloatingPoint KP1/KP6 DSPs
Vendor
Cadence Design Systems, Inc.
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Cadence Design Systems, Inc.
HQ: USA
If you want to achieve silicon success, let Cadence help you choose the right IP solution and capture its full value in your SoC design. Cadence® IP solutions offer the combined advantages of a high-quality portfolio, an open platform, a modern IP factory approach to quality, and a strong ecosystem. Now you can tackle IP-to-SoC development in a system context, focus your internal effort on differentiation, and leverage multi-function cores to do more, faster. The Cadence IP Portfolio includes silicon-proven Tensilica® IP cores, analog PHY interfaces, standards-based IP cores, verification IP cores, and other solutions as well as customization services for current and emerging industry standards. The Cadence IP Factory provides you with an automated approach to the customization, delivery, and verification of SoC IP. As a result, you can spend more time on differentiation, with the assurance that you'll meet your performance, power, and area requirements. Choosing Cadence IP enables you to design with confidence because you have more freedom to innovate your SoCs with less risk and faster time to market.
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Learn more about DSP Core IP core

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Frequently asked questions about DSP Core IP cores

What is Tensilica FloatingPoint KP1/KP6 DSPs?

Tensilica FloatingPoint KP1/KP6 DSPs is a DSP Core IP core from Cadence Design Systems, Inc. listed on Semi IP Hub.

How should engineers evaluate this DSP Core?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DSP Core IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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