Vendor: Cadence Design Systems, Inc. Category: DSP Core

Tensilica FloatingPoint KP1/KP6 DSPs

High-performance DSPs designed for floating-point-centric processing with ultra-low energy and small area Cadence® Tensilica® Flo…

Overview

High-performance DSPs designed for floating-point-centric processing with ultra-low energy and small area

Cadence® Tensilica® FloatingPoint KP1/KP6 DSPs provide high-performance floating-point computation throughput with low energy consumption and small area footprint. The configurability and extensibility of Tensilica FloatingPoint KP1/KP6 DSPs give the SoC designers flexibility to configure a floating-point DSP that meets their performance requirements with low energy and small area budgets. Tensilica FloatingPoint KP1/KP6 DSPs are optimized for applications in battery-operated devices, AI/ML, AR/VR, motor control, smart sensors, sensor fusion, ADAS, autonomous driving, etc.

Key features

  • VLIW parallelism issuing multiple concurrent operations per cycle
  • Xtensa LX Secure Mode
  • 128-bit and 512-bit SIMD
  • IEEE 754 vector floating-point
  • Performance optimized fused multiply-add (FMA)
  • 8b/16b/32b/64b integer ALU operations
  • Optimized for FFT operations
  • Enhanced complex data processing
  • Superior auto vectorization support
  • TIE for easy extension and further performance enhancement

Applications

  • Automotive,
  • Communications,
  • Consumer Electronics,
  • Data Processing,
  • Industrial and Medical,
  • Military/Civil Aerospace,
  • Others

Specifications

Identity

Part Number
Tensilica FloatingPoint KP1/KP6 DSPs
Vendor
Cadence Design Systems, Inc.
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about DSP Core IP core

Cadence Expands Sovereign AI in Europe: From Chips to AI Factories

To bring computing scale and regional data control together, Cadence is expanding its sovereign AI data center in Munich, becoming the first electronic design automation (EDA)opens in a new tab vendor to deliver a comprehensive sovereign AI platform for semiconductor, system, and AI factory design in Europe.

The Memory Challenge of Physical AI

As physical AI workloads become more complex, architects must now consider how predictably the complete system performs when multiple real-world workloads are active simultaneously.

Frequently asked questions about DSP Core IP cores

What is Tensilica FloatingPoint KP1/KP6 DSPs?

Tensilica FloatingPoint KP1/KP6 DSPs is a DSP Core IP core from Cadence Design Systems, Inc. listed on Semi IP Hub.

How should engineers evaluate this DSP Core?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DSP Core IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP