TDM-Tx-Pro: Configurable Multi-channel Serial Audio Transmitter
Overview
The TDM-Tx-Pro (CWda19) is part of the AudioWorks family of proven audio interface cores featuring a configurable multi-channel audio interface designed to output a serial (TDM) digital audio stream. The TDM-Tx-Pro front-end interface also supports the well known stereo formats: Philips I2S, Left-Justified or Right-Justified. The TDM-Tx-Pro backend interface is supplied with a choice of AMBA®, CoreConnect™ or a flexible parallel interface.
Key Features
- Runtime configurable output format: multi-channel audio serial (TDM) and also I2S, Left Justified, Right Justified
- Supports all commonly used sample rates including 32, 44.1, 48, 96 and 192 kHz
- Runtime configurable sample width, ranging from 8 to 32 bits per sample
- Pre-synthesis configurable sample FIFO depth
- Reports FIFO full condition
- Reports number of samples in FIFO
- Runtime configurable Lower-FIFO-Limit; a request is activated when this limit is exceeded
- Supports slave or master modes of the audio bus
- Supports up to 128 audio channels
Benefits
- Permits rapid development of a TDM audio front-end interface for a multitude of vendor specific formats
- Flexible backend interface: AMBA®, CoreConnect™ or just parallel with REQ/ACK handshaking
Deliverables
- Verilog source code or FPGA netlist
- Verilog testbench for RTL simulation
- Synthesis constraints
- Datasheet
- Example software driver
Technical Specifications
Foundry, Node
All
Maturity
Silicon and FPGA proven
Availability
Now
TSMC
Pre-Silicon:
65nm
GP
,
90nm
G
,
130nm
G
Related IPs
- TDM-Rx-Pro: Configurable Multi-channel Serial Audio Receiver
- TDM-Pro : Configurable Multi-Channel Serial Audio Transceiver
- 103 dB of SNR, 24-bit stereo multichannel audio CODEC with capless headphone outputs, suitable for 5.1 applications
- 100 dB of SNR, 24-bit multichannel audio CODEC with embedded regulator and high CMRR
- Multi-Video-Source Multiplexing Serial Video Transmitter for MIPI CSI2
- Multi-channel Audio Digital Interface (MADI) IP Core