Symmetrical FIR Filter

Overview

FIR filter designed for high sample rate applications with symmetrical coefficients and an even or odd number of taps. Features configurable coefficients and data width. Design uses only half the number of multipliers compared to a normal FIR implementation.

Matlab®, FDAtool and Simulink® compatible.

Key Features

  • Systolic array for speed and scalability
  • 50% less multipliers than a direct-form FIR
  • Support for filters with inverted symmetry
  • Configurable coefficients
  • Configurable data width
  • Configurable number of taps
  • Symmetric arithmetic rounding
  • Output saturation or wrap modes
  • FPGA sample rates up to 500 MHz
  • Matlab®, FDAtool® and Simulink® compatible

Benefits

  • Technology independent soft IP Core
  • Suitable for FPGA, SoC and ASIC
  • Supplied as human-readable source code
  • One-time license fee with unlimited use
  • Field tested and market proven
  • Any custom modification on request

Block Diagram

Symmetrical FIR Filter Block Diagram

Deliverables

  • VHDL source-code (or Verilog on request)
  • Simulation test bench
  • Examples and scripts
  • Full pdf datasheet
  • One-to-one technical support
  • One years warranty and maintenance

Technical Specifications

Foundry, Node
All
Availability
Immediate
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Semiconductor IP