IP Catalog > Analog IP > Power Management IP > Regulator IP > Switching regulator, inductor-based, in dual mode (PFM and PWM), high efficiency

Switching regulator, inductor-based, in dual mode (PFM and PWM), high efficiency

Overview

eSR-Niagara-Bu-dm-ref-[1.9-4.4]-[0.8-3.3].02, as any Power Management Virtual Component designed by Dolphin Design, is readily re-targetable toward any sub micron CMOS process.

Key Features

  • High efficiency buck regulator (up to 95% in peak), thanks to dual mode (dm) controller
  • Pulse Frequency Modulation (PFM) mode at low load and Pulse With Modulation (PWM) mode at high load.
  • Low Bill-Of-Material: fully integrated feedback and active compensation loop do not require additional external passive components.
  • Behavioral models: ease integration in SoC and optimized Power Management Network (PMNet) by verifying mode transitions as well as noise propagation

Block Diagram

Switching regulator, inductor-based, in dual mode (PFM and PWM), high efficiency Block Diagram

Technical Specifications

Foundry, Node
TSMC 55nm uLP eFlash
Maturity
Pre-silicon
TSMC
Pre-Silicon: 55nm FL , 55nm G , 55nm GP , 55nm LP , 55nm NF , 55nm ULP , 55nm ULPEF , 55nm UP
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