SuperSpeed USB 3.0 Host Controller Supporting SSIC and HSIC

Overview

The vendor provides designers with silicon-proven, configurable USB 3.0 Controllers that are compliant with the USB-Implementers Forum (USB-IF) USB 3.0 specification. The USB 3.0 controllers provide the lowest possible gate count, efficient power management optimized with dual power rails, and USB 3.0 PIPE and USB 2.0 UTMI/UTMI+ interfaces for PHYs. This comprehensive solution also includes support for Dual Role Device (DRD), xHCI Host, and Device Controllers and SuperSpeed InterChip (SSIC), High Speed InterChip (HSIC), and OTG 2.0 features.

The USB 3.0 Controller IP offers the flexibility required for high-volume, fast turnaround consumer applications. Configuration options maximize SoC design performance and minimize CPU interrupts, while flexible parameters enable easy integration into low- and high-latency systems.

The USB Controller IP has shipped in over one billion units for leading electronics companies worldwide. Using the USB IP significantly reduces development time and engineering risk, bringing USB-based SoCs to market faster.

The USB IP is the most certified IP solution in the industry. With over 3,000 design wins, the vendor's complete USB IP solution--consisting of controllers, PHYs, verification IP, drivers, and IP prototypes--enables designers to lower integration risk and speed time-to-market.

Key Features

  • Supports SuperSpeed USB power savings modes, Uniform Power Format (UPF) and dual power rails
  • Lowers overall system power by design
  • Configurable data buffering options to fine-tune performance/area trade-offs
  • Host supports SuperSpeed, High-Speed, Full-Speed, and Low-Speed operation
  • Host Controller compatible with common operating systems that support the xHCI standard, such as Windows 8 and Linux
  • Device supports SuperSpeed, High-Speed, and Full-Speed operation
  • DRD supports either Host or Device operation

Block Diagram

SuperSpeed USB 3.0 Host Controller Supporting SSIC and HSIC Block Diagram

Technical Specifications

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Semiconductor IP