USB3.2 SuperSpeed Hub
The Super Speed Plus USB bus is implemented as a separate dual-simplex dual lane data path consisting of two uni-directional differential links, one for transferring data from the host downstream to Hub3.2 or USB3.2 Peripherals and one for transferring data from Hub or Peripherals upstream to the USB host.
The D+/D- signal pins defined by USB 2.0 are not used for Super Speed Plus operation but are provided to allow for backward compatible operation.
Super-SpeedPlus USB3.2 Hub Controller (VUSB3.2 HUB)
The Vinchip VUSB3.2 HUB core provides a USB3.2 functional SSP US Controller, SSP Hub controller and SSP DS Controller that conforms to the USB 3.2 specification for Enhanced Super-Speed (with four different rates gen2x2 -20Gbps , gen2xl - 10Gbps , genlx2 - 10Gbps and genlxl -5 Gbps)and with backward compatible USB2.0 Hub (480, 12 and 1.5 Mbps) functions. The 3.2 Hub Repeater / Forwarder is responsible for connectivity setup, tear down, bus fault detection and recovery and connect / disconnect detection. Hub specific status and control commands allows host to configure the hub and control its individual downstream facing ports. The backward compatible USB 2.0 Hub core consists of Hub Controller, Repeater and Transaction Translator.
The VUSB3.2 HUB provides a USB 3.2 Transceiver Interface (UTMI extension to usb3.2) to connect to a super speed Plus transceiver.
Super-Speed Plus USB 3.2 Hub Controller
Overview
Key Features
- Supports two lanes or one lane - easily configurable
- Number of downstream ports can be easily selected
- Complies with USB 3.2 standard for Super-Speed Plus(10Gbps),Super-Speed(5.0 Gbps), Hi-Speed (480 Mbps), Full-Speed (12 Mbps) and Low-Speed (1.5 Mbps).
- Backward compatible with USB2.0 devices and hubs and the type A connectors.
- Technology and Process independent.
- Data Interface is Dual-simplex, 4-wire differential signaling for each lane,separate from USB2.0 signaling with downstream connect / disconnect detection.
- Supports Superspeed UTMI transceiver interface with extension to the existing UTMI Interface for USB2.0
- Super-Speedplus Hub3.2 consists of Hub Forwarder/Repeater and a Hub Controller.
- Separate Header Buffers for each Upstream and Downstream Port’s traffic Forwarding / Repeating.
- Compatible USB transfer support for Control and Interrupttransfers to USB3.2 Hub using USB3.2 Transaction/Handshake Packets and the Data Packets.
- Super-speedPlus Independent Data Packet Buffering and Concurrent transactions in both Upstream and Downstream directions
- Bus Transaction protocol is host directed and has asynchronous traffic flow. The packet traffic is explicitly routed.
- Store and Forward more than one data packets at the same time.
- End-to-End Protocol will retry for recovery.
- Support all standard and Hub specific control transfer requests.
- Super-speedplus Repeater/Forwarder reclock packets in both the directions.
- Supports suspend and resume signaling and also handle Hub Power Management.
- Utility for wiring of parameterizable downstream Ports, its routing and descriptor generation.
- Fully synthesizable.
Block Diagram
Deliverables
- Verilog source code and test-bench.
- Scripts for simulation and synthesis.
Technical Specifications
Availability
Immediate