Stereo 3D depth value Correspondenc calculation with 64 disparities

Overview

iv-corr implements a 1-dimensional search
algorithm for stereo correspondences in
stereo pictures.
The algorithms performs a pixel by pixel
measurement of the horizontal correlation
between pixels in a left and right image. The
IP outputs the disparity of the closest match
(0-63) and its matching value (actual
minimum) for use in subsequent post
processing.
iv-corr operates on pixelrates up to
75Mpixel/sec and with a maximum line size
of 1536 pixels.
Programmable Parameters are:
input picture size

Key Features

Stereo Correspondence Calculation
64 Disparities
75MSampes/sec
1 Depth Value per cycle
Block based matching algorithm

Benefits

Real time disparity calculation based on simple block matching algorithm

Video

Deliverables

Verilog 2001 compatible code
Customized for your application
Integrated to your existing code
Easily interfaced to standard I/O standards
Excellent code and expression coverage
FPGA proven design
Real time demos available
Application support available
HDL Source Licenses

Synthesizable Verilog 2001 RTL* (VHDL option available)
Self checking Verilog Testbench **
VCD dump option
Expected results generator
Simulation script
Test stimuli vectors
Test config vectors
Generic API optional available
Coverage reports
Synthesis script
IP Documentation

Netlist Licenses

For FPGA platforms: XILINX, Lattice, Altera
For ASIC: please ask

Technical Specifications

Maturity

Products with XILINX SPARTAN6, VIRTEX6

Availability

now

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