Spread Spectrum PLL on TSMC CLN40LP-ULP

Overview

It isa requirement by FCC that allelectronic devices including game-consoles, PCs, and high speed compute servers, limit Electromagnetic Interference (EMI) when they distribute high-speed signals.

Analog Bits’ spread spectrum clock generation macro is capable of generating fine clock spreads that help reduce EMI. The precision spread-spectrum clock spreading is achieved by a combination of integer and fractional multiplication. The fractional divider generates a programmable triangular waveform to precisely control the degrees of spread. Programmable options allow the user to control the degree of spread in fine steps of +0/-0.5% and up to +0/-1.5% of the output clocks.

The spread spectrum macro is integrated with the PLL macro and is implemented in Analog Bits’ proprietary architecture. The combined spread-spectrum generation and PLL is the smallest PLL in the industry. Eliminating band-gaps and integrating all on-chip components such as capacitors and ESD structures, helps the jitter performance significantly and reduces stand-by power. The spread spectrum generation PLL macro may be either IO pad ring or core integrated.

Silicon Proven Analog Bits’ spread spectrum architecture is in volume production in Xbox 360.

FNOM Frequency Spreading FNOM - % TMOD = 31.25 μs Figure 1: Precision Modulation Creating Spread Spectrum Clocks and Typical Layout of SSCG PLL

Key Features

  • Electrically Programmable Macro for Spread Spectrum Clock Generation
  • Fractional divide control option allows fine spread control +0/-1.5% in steps of -0.5%
  • Module integrated in Analog Bits standard PLL/Frequency Synthesizer
  • Implemented with Analog Bits’ proprietary architecture using logic devices only
  • May be fully integrated inside customer specific IO ring or in the core
  • Smallest Spread spectrum PLL in the industry
  • Lowest power consumption – less than 4mA including the PLL
  • Requires no additional on-chip components or band-gaps, minimizing power consumption
  • Excellent jitter performance with optimized noise rejection with or without spreading

Technical Specifications

Foundry, Node
TSMC CLN40LP-ULP
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Semiconductor IP