Next-generation CMOS image sensor interface, SLVS-EC v3.0, is implemented in FPGAs
SLVS-EC v3.0 Rx IP is an interface IP core that runs on Altera® FPGAs. Using this IP, you can quickly and easily implement products that support the latest SLVS-EC standard v3.0. You will also receive an "Evaluation kit" for early adoption.
- Altera® FPGAs can receive signals directly from the SLVS-EC Interface.
- Compatible with the latest SLVS-EC Specification Version 3.0.
- Supports powerful De-Skew function. Enables board design without considering Skew that occurs between lanes.
- "Evaluation kit”(see below) is available for speedy evaluation at the actual device level.
Overview of SLVS-EC Standard
- SLVS-EC (Scalable Low Voltage Signaling with Embedded Clock) is an interface standard for high-speed & high-resolution image sensors developed by Sony Semiconductor Solutions Corporation.
- The SLVS-EC standard is standardized by JIIA (Japan Industrial Imaging Association).
