Single Port Register File compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 40 k
Overview
Foundry sponsored - Single Port Register File compiler - TSMC 55 nm uLP - Memory optimized for high density and low power - Dual Voltage - compiler range up to 40 kbits
Key Features
- FOUNDRY SPONSORED
- HIGHEST DENSITY
- -Smart periphery design for significant gain in density
- EXTENDED BATTERY LIFE
- -Data retention mode at 1.2 V +/-10% and 0.9 V +/-10% to divide drastically the leakage compared to simple stand by mode
- -Byte write capability
- EASIEST INTEGRATION
- -Data range flexibility allows easy addition of bits for redundancy or ECC purposes
- -Address range flexibility allows easy addition of single rows for redundancy purposes
- ENABLES RIGHT ON FIRST PASS DESIGN
- -Complete mismatch validation of the memory architecture taking in account local and global dispersion
- -Extended validation for high coverage rate of the compiler
Technical Specifications
Maturity
In_Production
TSMC
In Production:
55nm
ULP
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