Simulation VIP for Ethernet FlexE

Overview

The Cadence® Verification IP (VIP) for Flexible Ethernet (FlexE) provides a mature, highly capable compliance verification solution for the FlexE protocol stack incorporating bus functional model (BFM) and integrated protocol checkers and coverage. The VIP for FlexE is designed for easy integration in test benches at IP, system-on-chip (SoC), and system levels helping to reduce time to test, accelerate verification closure, and ensure end-product quality. The VIP for Ethernet FlexE is compatible with the industry-standard Universal Verification Methodology (UVM) and runs on all leading simulators.

Supported specification: OIF FLEXE-02.1(2019) and IEEE 802.3-2018.

Key Features

  • OIF FLEXE-02.1(2019)
    • Channelization/Bonding/Sub-Rating/Hybrid
    • Multiple 50G/100G/200G/400G BaseR PHY
    • FlexE clients of 5G, 10G, 25G, 40G, 50G, 100G, 200G, and 400G speeds
    • Maximum number of FlexE clients supported: 80
    • Maximum number of BaseR PHY supported: 8
    • 5G and 25G granularity
    • Calendar A/B
    • Calendar Resizing
    • Padding and Interleaving
    • Management and Synchronization frames
    • Skew/De-skew
  • PMA Bus-Width
    • 1, 2, 4, 10, 16, 20, 32, 40, 64, 66, 80, 120, 128, 160
  • Frame Types
    • Ethernet IEEE 802.3 (type and length defined)
    • Jumbo frame
    • MAGIC frame
    • Version II frame
    • Tagged Frames: Single Tagged (Q-VLAN tag) and Double tagged (S-VLAN tag and Q-VLAN tag)
    • PTP
    • MACSEC
  • Custom Frame
    • Proprietary header
  • Clock
    • Single Clock mode - External

    Block Diagram

    Simulation VIP for Ethernet FlexE Block Diagram

    Technical Specifications

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Semiconductor IP